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A Test Pattern Quality Metric for Diagnosis of Multiple Stuck-at and Transition faults

Published: 10 May 2017 Publication History

Abstract

The test patterns computed for detecting the manufacturing defects in the electronic circuits are generally insufficient for diagnosis. The test set compaction and failure log truncation lead to loss of critical failure observations that diagnosis might depend on. In this context, it is beneficial to know the diagnostic usefulness of failures so that we can log the more useful failures instead of logging the initial failures. In this paper, we evaluate three metrics to gauge such diagnostic usefulness in real-time by observing the circuit responses on the tester. We implement a pattern selection framework for failure logging and compare the results with those achieved by logging the initial failures. Using one of our proposed metrics, we were able to improve the diagnosis quality for a significant number of faulty instances of ISCAS'89 and IWLS'05 benchmarks having 1-7 inserted stuck-at and transition faults.

References

[1]
S. Bodhe, M. E. Amyeen, C. Galendez, H. Mooers, I. Pomeranz, and S. Venkataraman. Reduction of diagnostic fail data volume and tester time using a dynamic n-cover algorithm. In 2016 IEEE 34th VLSI Test Symposium (VTS), pages 1--6. IEEE, 2016.
[2]
S. Bodhe, M. E. Amyeen, I. Pomeranz, and S. Venkataraman. Diagnostic fail data minimization using an-cover algorithm. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24(3):1198--1202, 2016.
[3]
C. Bolchini, E. Quintarelli, F. Salice, and P. Garza. A data mining approach to incremental adaptive functional diagnosis. In 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), pages 13--18. IEEE, 2013.
[4]
K.-J. Lee, W.-C. Lien, and T.-Y. Hsieh. Test response compaction via output bit selection. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, 30(10):1534--1544, 2011.
[5]
S. Tanwir, S. Prabhu, M. Hsiao, and L. Lingappan. Information-theoretic and statistical methods of failure log selection for improved diagnosis. In Test Conference (ITC), 2015 IEEE International. IEEE, 2015.
[6]
H. Wang, O. Poku, X. Yu, S. Liu, I. Komara, and R. D. Blanton. Test-data volume optimization for diagnosis. In Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE, pages 567--572. IEEE, 2012.

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  1. A Test Pattern Quality Metric for Diagnosis of Multiple Stuck-at and Transition faults

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    cover image ACM Conferences
    GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017
    May 2017
    516 pages
    ISBN:9781450349727
    DOI:10.1145/3060403
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 10 May 2017

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    Author Tags

    1. diagnosis
    2. failure data
    3. failure sampling
    4. metric
    5. pattern selection
    6. real-time
    7. stuck-at faults
    8. transition faults

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    GLSVLSI '17
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    GLSVLSI '17: Great Lakes Symposium on VLSI 2017
    May 10 - 12, 2017
    Alberta, Banff, Canada

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    GLSVLSI '17 Paper Acceptance Rate 48 of 197 submissions, 24%;
    Overall Acceptance Rate 312 of 1,156 submissions, 27%

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