Design and Simulation of a 3.35 GHz Down-Conversion Mixer in 0.18μm CMOS Technology for UWB System
Pages 452 - 455
Abstract
A low voltage and high gain down-conversion mixer is designed and implemented in a 0.18μm CMOS technology for UWB applications. The proposed mixer is based on the traditional Gilbert cell along with inductive source degeneration in the RF trans-conductance stage. It also incorporates DTMOS (Dynamic Threshold Voltage MOSFET) technique and a LC matching network at the RF trans-conductance stage in order to improve the linearity and conversion gain of the mixer. The RF signal is applied simultaneously to both the gate and the body of the trans-conductance transistors and the LO signal is applied simultaneously to both the gate as well as the body terminals of the switching transistors.The proposed mixer is designed for a Radio Frequency (RF) signal of 3.35 GHz with a fixed Intermediate Frequency (IF) of 250 MHz. The proposed mixer is simulated using Advanced Design System (ADS) software in a 0.18μm CMOS technology at the DC supply of 1V. Simulation results show that the mixer achieves a conversion gain of 10.065 dB, third order Input Intercept point (IIP3) of -1.535 dBm, 1dB gain compression point of -13.028 dBm, S11 of -7.891 dB and a single sideband noise figure of 4.534 dB.
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Index Terms
- Design and Simulation of a 3.35 GHz Down-Conversion Mixer in 0.18μm CMOS Technology for UWB System
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September 2015
481 pages
ISBN:9781450335522
DOI:10.1145/2818567
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Published: 25 September 2015
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ICCCT '15
ICCCT '15: Sixth International Conference on Computer and Communication Technology 2015
September 25 - 27, 2015
Allahabad, India
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