Mapping multiplication algorithms into a family of LUT-based FPGAs (abstract)
Abstract
Index Terms
- Mapping multiplication algorithms into a family of LUT-based FPGAs (abstract)
Recommendations
Reconfigurability-Aware Structural Mapping for LUT-Based FPGAs
RECONFIG '08: Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAsIn many applications, subsequent tasks differ only in a specific set of parameters. Because of their reconfigurability, FPGAs (Field Programmable Gate Arrays) can be configured with an optimized configuration every time these parameter values change. ...
LUT based realization of fixed-point multipliers targeting state-of-art FPGAs
Look-up tables (LUT) form the basic logic elements in a large class of modern day field programmable gate arrays (FPGA). With FPGAs increasingly being used in low and medium volume productions, many vendors have improved the capacity and versatility of ...
Comments
Information & Contributors
Information
Published In
Sponsors
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Check for updates
Qualifiers
- Article
Conference
Acceptance Rates
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Other Metrics
Citations
View Options
View options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in