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Low power high level synthesis by increasing data correlation

Published: 01 August 1997 Publication History
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References

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D. Gajski and N. Dutt, High-level Synthesis: Introduction to Chip and System Design. Kluwer Academic Publishers, 1992.
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G. D. Mieheli, Synthesis and Optimization of DigitaI Circuits. New York: McGraw Hill, Inc., 1994.
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A. P. Chandrakasan, S. Sheng, and R. W. Brodersen, "Low-power CMOS digitial design," 1EEE J. of Solid- State Circuits, pp. 473-484, 1992.
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A. P. Chandrakasan, M. Potkonjak, R. Mehra, J. Rabaey, and R. W. Brodersen, "Opftmizing power using transformation," 1EEE Tr. on CAD/ICAS, pp. 12- 31, Jan. 1995.
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L. Goodby, A. Orailoglue, and P. M. Chau, "Microarehiteetural synthesis of performance-constrained, lowpower VLSI designs;' in Prec. of Int'l Conf. on Computer Design, pp. 323--326, Oct. 1994.
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A. Raghunathan and N. K. Jha, "Behavioral synthesis for low power," inProc, of Int'l Conf. on Computer Design, pp. 318--322, Oct. 1994.
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E. Musoll and J. Cortadella, "Scheduling and resource binding for low power," in Prec. of lnt 7 Syrup, on System Synthesis, pp. 104-109, Apr. 1995.
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R. Mehra, L. M. Guerra, and J. Rabaey, "Low power architectural synthesis and the impact of exploiting locality,' Journal of FLSI Signal Processing, 1996.
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M. B. Srivastava, A. P. Chandrakasan, and R. W. Brodersen, "Predictive system shutdown and other architectural techniques for energy efficient programmable computation,' IEEE Tn on FLSI Systems, pp. 42-55, Mar. 1996.
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P. Landman and J. Rabaey, '~krehiteetural power analysis: the dual bit type method;' 1EEE Tr. on FLSI Systems, pp. 173-187, June 1995.
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  1. Low power high level synthesis by increasing data correlation

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    cover image ACM Conferences
    ISLPED '97: Proceedings of the 1997 international symposium on Low power electronics and design
    August 1997
    335 pages
    ISBN:0897919033
    DOI:10.1145/263272
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    Published: 01 August 1997

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