research-article

The roce-bush router: a case for routing-centric dimensional decomposition for low-latency 3D noC routers

Authors:

Sudeep PasrichaAuthors Info & Claims

CODES+ISSS '12: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

Pages 171 - 180

https://doi.org/10.1145/2380445.2380476

Published: 07 October 2012 Publication History

Abstract

As 3D System-On-Chips (SoCs) come ever closer to becoming the standard for high performance ICs, 3D Networks on Chips (NoCs) have emerged as a key component in meeting performance constraints and ensuring power-efficiency. Among the proposed 3D router architectures, dimensionally-decomposed routers are widely accepted as an efficient solution to deal with the increased port count and the accompanying exponential power and area increases. All decompositions proposed thus far have however been dimensionally static, that is, they have set in stone a particular bias among the three dimensions. This paper presents a novel router with a routing-centric decomposition and virtual channel buffer sharing called the Roce-Bush router. To our knowledge, this is the first work that integrates routing-awareness in the context of dimensional decomposition and buffer resource allocation for NoC routers. Experimental results involving RTL level implementations of our router and synthesis at 45nm show that compared to a dimensional-agnostic decomposed router, the Roce-Bush router can achieve up to 14% better performance and 5% lower power.

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Cited By

Kyungsu Kang Benini LDe Micheli G(2015)Cost-Effective Design of Mesh-of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad MemoryIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.234603223:9(1828-1841)Online publication date: 1-Sep-2015
https://dl.acm.org/doi/10.1109/TVLSI.2014.2346032
Venkatesh Rengasamy PMutyam M(2014)Using packet information for efficient communication in NoCs2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS)10.1109/NOCS.2014.7008773(143-150)Online publication date: Sep-2014
https://doi.org/10.1109/NOCS.2014.7008773

Index Terms

The roce-bush router: a case for routing-centric dimensional decomposition for low-latency 3D noC routers
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures
2. Hardware
  1. Electronic design automation
    1. High-level and register-transfer level synthesis
      1. Datapath optimization

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cover image ACM Conferences

CODES+ISSS '12: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

October 2012

596 pages

ISBN:9781450314268

DOI:10.1145/2380445

General Chairs:
Ahmed Jerraya
CEA
,
Luca Carloni
Columbia University
,
Program Chairs:
Naehyuck Chang
Seoul National University, Korea
,
Franco Fummi
University of Verona, Italy

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 07 October 2012

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ESWEEK'12

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ESWEEK'12: Eighth Embedded System Week

October 7 - 12, 2012

Tampere, Finland

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CODES+ISSS '12 Paper Acceptance Rate 48 of 163 submissions, 29%;

Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

Kyungsu Kang Benini LDe Micheli G(2015)Cost-Effective Design of Mesh-of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad MemoryIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.234603223:9(1828-1841)Online publication date: 1-Sep-2015
https://dl.acm.org/doi/10.1109/TVLSI.2014.2346032
Venkatesh Rengasamy PMutyam M(2014)Using packet information for efficient communication in NoCs2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS)10.1109/NOCS.2014.7008773(143-150)Online publication date: Sep-2014
https://doi.org/10.1109/NOCS.2014.7008773

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