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An estimation technique to guide low power resynthesis algorithms

Authors:

Christopher K. Lennard,

A. Richard NewtonAuthors Info & Claims

ISLPED '95: Proceedings of the 1995 international symposium on Low power design

Pages 227 - 232

https://doi.org/10.1145/224081.224121

Published: 23 April 1995 Publication History

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References

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Cited By

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Iman SPedram M(2006)An approach for multilevel logic optimization targeting low powerIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.51156915:8(889-901)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.511569
Lennard CNewton A(2006)On estimation accuracy for guiding low-power resynthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.50393415:6(644-664)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.503934
Iman SPedram MIman SPedram M(1998)Logic Minimization for Low PowerLogic Synthesis for Low Power VLSI Designs10.1007/978-1-4615-5453-0_6(109-148)Online publication date: 1998
https://doi.org/10.1007/978-1-4615-5453-0_6
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An estimation technique to guide low power resynthesis algorithms

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Published In

ISLPED '95: Proceedings of the 1995 international symposium on Low power design

April 1995

233 pages

ISBN:0897917448

DOI:10.1145/224081

Chairmen:
Massoud Pedram
USC, Los Angeles, CA
,
Robert Brodersen
UCB, Berkeley, CA
,
Kurt Keutzer
Synopsys, Mountain View, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 23 April 1995

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LPD95

Sponsor:

SIGDA
IEEE-CAS

LPD95: Low Power Design Symposium

April 23 - 26, 1995

California, Dana Point, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

View all

Iman SPedram M(2006)An approach for multilevel logic optimization targeting low powerIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.51156915:8(889-901)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.511569
Lennard CNewton A(2006)On estimation accuracy for guiding low-power resynthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.50393415:6(644-664)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.503934
Iman SPedram MIman SPedram M(1998)Logic Minimization for Low PowerLogic Synthesis for Low Power VLSI Designs10.1007/978-1-4615-5453-0_6(109-148)Online publication date: 1998
https://doi.org/10.1007/978-1-4615-5453-0_6
Buch PLennard CNewton ABarton BPedram MChandrakasan AKiaei S(1997)Engineering change for power optimization using global sensitivity and synthesis flexibilityProceedings of the 1997 international symposium on Low power electronics and design10.1145/263272.263290(88-91)Online publication date: 1-Aug-1997
https://dl.acm.org/doi/10.1145/263272.263290
Monteiro JDevadas SMonteiro JDevadas S(1997)ConclusionComputer-Aided Design Techniques for Low Power Sequential Logic Circuits10.1007/978-1-4615-6319-8_9(173-178)Online publication date: 1997
https://doi.org/10.1007/978-1-4615-6319-8_9
Iman SPedram M(1997)Combinational Circuit OptimizationLow Power Design in Deep Submicron Electronics10.1007/978-1-4615-5685-5_9(267-320)Online publication date: 1997
https://doi.org/10.1007/978-1-4615-5685-5_9
Lennard CBuch PNewton AHorowitz MRabaey JBarton BPedram M(1996)Logic synthesis using power-sensitive don't care setsProceedings of the 1996 international symposium on Low power electronics and design10.5555/252493.252622(293-296)Online publication date: 12-Aug-1996
https://dl.acm.org/doi/10.5555/252493.252622
Lennard CBuch PNewton A(1996)Logic synthesis using power-sensitive Don't Care setsProceedings of 1996 International Symposium on Low Power Electronics and Design10.1109/LPE.1996.547526(293-296)Online publication date: 1996
https://doi.org/10.1109/LPE.1996.547526
Pedram M(1996)Logic Synthesis for Low PowerLow Power Design Methodologies10.1007/978-1-4615-2307-9_6(129-160)Online publication date: 1996
https://doi.org/10.1007/978-1-4615-2307-9_6

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