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Low voltage analog circuits using standard CMOS technology

Authors:

Phillip E. Allen,

Benjamin J. Blalock,

Gabriel A. RinconAuthors Info & Claims

ISLPED '95: Proceedings of the 1995 international symposium on Low power design

Pages 209 - 214

https://doi.org/10.1145/224081.224118

Published: 23 April 1995 Publication History

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Cited By

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Nidhi KKer M(2017)A CMOS-Process-Compatible Low-Voltage Junction-FET With Adjustable Pinch-Off VoltageIEEE Transactions on Electron Devices10.1109/TED.2017.270642364:7(2812-2819)Online publication date: Jul-2017
https://doi.org/10.1109/TED.2017.2706423
Saha S(2016)Modeling Statistical Dopant Fluctuations Effect on Threshold Voltage of Scaled JFET DevicesIEEE Access10.1109/ACCESS.2016.25190394(507-513)Online publication date: 2016
https://doi.org/10.1109/ACCESS.2016.2519039
Biju NAswathy MKomaragiri R(2013)Mixed Mode Circuit Simulation of a Junction-Less Transistor and a Comparative Study with CMOS InverterProceedings of the 2013 Third International Conference on Advances in Computing and Communications10.1109/ICACC.2013.99(141-144)Online publication date: 29-Aug-2013
https://dl.acm.org/doi/10.1109/ICACC.2013.99
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Index Terms

Low voltage analog circuits using standard CMOS technology
1. Applied computing
  1. Physical sciences and engineering
    1. Electronics
2. Hardware

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Published In

ISLPED '95: Proceedings of the 1995 international symposium on Low power design

April 1995

233 pages

ISBN:0897917448

DOI:10.1145/224081

Chairmen:
Massoud Pedram
USC, Los Angeles, CA
,
Robert Brodersen
UCB, Berkeley, CA
,
Kurt Keutzer
Synopsys, Mountain View, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 23 April 1995

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LPD95

Sponsor:

SIGDA
IEEE-CAS

LPD95: Low Power Design Symposium

April 23 - 26, 1995

California, Dana Point, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

View all

Nidhi KKer M(2017)A CMOS-Process-Compatible Low-Voltage Junction-FET With Adjustable Pinch-Off VoltageIEEE Transactions on Electron Devices10.1109/TED.2017.270642364:7(2812-2819)Online publication date: Jul-2017
https://doi.org/10.1109/TED.2017.2706423
Saha S(2016)Modeling Statistical Dopant Fluctuations Effect on Threshold Voltage of Scaled JFET DevicesIEEE Access10.1109/ACCESS.2016.25190394(507-513)Online publication date: 2016
https://doi.org/10.1109/ACCESS.2016.2519039
Biju NAswathy MKomaragiri R(2013)Mixed Mode Circuit Simulation of a Junction-Less Transistor and a Comparative Study with CMOS InverterProceedings of the 2013 Third International Conference on Advances in Computing and Communications10.1109/ICACC.2013.99(141-144)Online publication date: 29-Aug-2013
https://dl.acm.org/doi/10.1109/ICACC.2013.99
Sandhu MBala M(2012)Design of Low Voltage Low Power Operational AmplifierProceedings of the 2012 Second International Conference on Advanced Computing & Communication Technologies10.1109/ACCT.2012.46(368-373)Online publication date: 7-Jan-2012
https://dl.acm.org/doi/10.1109/ACCT.2012.46
Zohaib Samad HPatri Sriharirao Sarangam K(2010)Low voltage low power pipelined ADC for video applications2010 IEEE Students Technology Symposium (TechSym)10.1109/TECHSYM.2010.5469177(161-165)Online publication date: Apr-2010
https://doi.org/10.1109/TECHSYM.2010.5469177
Saha S(2009)Source-drain engineering for Sub-90 nm junction-field-effect transistors2009 2nd International Workshop on Electron Devices and Semiconductor Technology10.1109/EDST.2009.5166094(1-6)Online publication date: Jun-2009
https://doi.org/10.1109/EDST.2009.5166094
Achigui HFayomi CSawan M(2006)1-V DTMOS-Based Class-AB Operational Amplifier: Implementation and Experimental ResultsIEEE Journal of Solid-State Circuits10.1109/JSSC.2006.88334141:11(2440-2448)Online publication date: Nov-2006
https://doi.org/10.1109/JSSC.2006.883341

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Very Low-Voltage Switched-Current Circuits in Standard Digital CMOS Process

A low-distortion CMOS analogue voltage follower for high-speed ADCs

A low distortion CMOS analogue switch with high-order compensation