skip to main content
research-article

Recent thermal management techniques for microprocessors

Published: 14 June 2012 Publication History

Abstract

Microprocessor design has recently encountered many constraints such as power, energy, reliability, and temperature. Among these challenging issues, temperature-related issues have become especially important within the past several years. We summarize recent thermal management techniques for microprocessors, focusing on those that affect or rely on the microarchitecture. We categorize thermal management techniques into six main categories: temperature monitoring, microarchitectural techniques, floorplanning, OS/compiler techniques, liquid cooling techniques, and thermal reliability/security. Temperature monitoring, a requirement for Dynamic Thermal Management (DTM), includes temperature estimation and sensor placement techniques for accurate temperature measurement or estimation. Microarchitectural techniques include both static and dynamic thermal management techniques that control hardware structures. Floorplanning covers a range of thermal-aware floorplanning techniques for 2D and 3D microprocessors. OS/compiler techniques include thermal-aware task scheduling and instruction scheduling techniques. Liquid cooling techniques are higher-capacity alternatives to conventional air cooling techniques. Thermal reliability/security issues cover temperature-dependent reliability modeling, Dynamic Reliability Management (DRM), and malicious codes that specifically cause overheating. Temperature-related issues will only become more challenging as process technology continues to evolve and transistor densities scale up faster than power per transistor scales down. The overall objective of this survey is to give microprocessor designers a broad perspective on various aspects of designing thermal-aware microprocessors and to guide future thermal management studies.

References

[1]
Adya, S. N. and Markov, I. L. 2003. Fixed-Outline floorplanning: Enabling hierarchical design. IEEE Trans. VLSI 11, 6, 1120--1135.
[2]
Aigner, G., Diwan, A., Heine, D. L., Lam, M. S., Moore, D. L., Murphy, B. R., and Sapuntzakis, C. 1999. An overview of the SUIF2 compiler infrastructure. Computer Systems Laboratory, Stanford University.
[3]
Albonesi, D. 1999. Selective cache ways: On-Demand cache resource allocation. In Proceedings of the International Symposium on Microarchitecture (MICRO'99). 248--259.
[4]
AMD. 2005. Processor utilization with Microsoft Windows Media Center Edition on systems enabled with Cool'n'Quiet and AMD PowerNow! technologies. Application note. May.
[5]
Andrei, A., Eles, P., Peng, Z., Schmitz, M. T., and Al-Hashimi, B. M. 2007. Energy optimization of multiprocessor systems on chip by voltage selection. IEEE Trans. VLSI 15, 3, 262--275.
[6]
Arani, A. S. 2007. Online thermal-aware scheduling for multiple clock domain CMPs. In Proceedings of the International IEEE SOC Conference (ISOCC'07). 137--140.
[7]
ARS Technica. 2008. NVIDIA denies rumors of faulty chips, mass GPU failures. http://arstechnica. com/hardware/news/2008/07/nvidia-denies-rumors-of-mass-gpu-failures.ars.
[8]
Aydin, H., Melhem, R., Moss'e, D., and Mei'ia-Alvarez, P. 2001. Dynamic and aggressive scheduling techniques for power-aware real-time systems. In Proceedings of the 22nd IEEE Real-Time Systems Symposium. 95--105.
[9]
Bao, M., Andrei, A., Eles, P., and Peng, Z. 2008. Temperature-Aware voltage selection for energy optimization. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'08). 1083--1086.
[10]
Berktold, M. and Tian, T. 2009. CPU monitoring with DTS/PECI. Intel white paper. September.
[11]
Borkar, S. 1999. Design challenges of technology scaling. IEEE Micro 19, 4, 23--29.
[12]
Brooks, D. and Martonosi, M. 2001. Dynamic thermal management for high-performance microprocessors. In Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA'01).
[13]
Brunschwiler, T., Michel, B., Rothuizen, H., Kloter, U., Wunderle, B., Oppermann, H., and Reichl, H. 2008. Forced convective interlayer cooling in vertically integrated packages. In Proceedings of the 11th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM'08). 1114--1125.
[14]
Chantem, T., Dick, R. P., and Hu, X. S. 2008. Temperature-Aware scheduling and assignment for hard real-time applications on MPSoCs. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'08). 288--293.
[15]
Chantem, T., Hu, X. S., and Dick, R. P. 2009. Online work maximization under a peak temperature constraint. In Proceedings of the International Symposium on Low Power Electronics and Design (ISPLED'09). 105--110.
[16]
Chaparro, P., Gonzalez, J., and Gonzalez, A. 2004. Thermal-Aware clustered microarchitectures. In Proceedings of the International Conference on Computer Design (ICCD'04). 48--53.
[17]
Chaparro, P., Magklis, G., Gonzalez, J., and Gonzalez, A. 2005. Distributing the frontend for temperature reduction. In Proceedings of the 11th International Symposium on High-Performance Computer Architecture (HPCA-11).
[18]
Chen, Q., Meterelliyoz, M., and Roy, K. 2006. A CMOS thermal sensor and its applications in temperature adaptive design. In Proceedings of the International Symposium on Quality Electronic Design (ISQED'06). 243--248.
[19]
Chen, C.-C., Lu, W.-F., Tsai, C.-C., and Chen, P. 2005. A time-to-digital-converter-based CMOS smart temperature sensor. In Proceedings of the International Symposium on Circuits and Systems (ISCAS'05). 560--563.
[20]
Chen, J.-J., Hung, C.-M., and Kuo, T.-W. 2007. On the minimization of the instantaneous temperature for periodic real-time tasks. In Proceedings of the 13th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'07). 236--248.
[21]
Choi, J., Cher, C., Franke, H., Haman, H., Weger, A., and Bose, P. 2007. Thermal-Aware task scheduling at the system software level. In Proceedings of the International Symposium on Low Power Electronics and Design (ISPLED'07).
[22]
Chu, C.-T., Zhang, X., He, L., and Jing, T. T. 2007. Temperature aware microprocessor floorplanning considering application dependent power load. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD'07). 586--589.
[23]
Chung, S. W. and Skadron, K. 2006a. Using on-chip event counters for high-resolution, real-time temperature measurements. In Proceedings of the Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM'06).
[24]
Chung, S. W. and Skadron, K. 2006b. A novel software solution for localized thermal problems. In Proceedings of the 4th International Symposium on Parallel and Distributed Processing and Applications (ISPA'06). Springer, 63--74.
[25]
Cong, J., Wei, J., and Zhang, Y. 2004. A thermal-driven floorplanning algorithm for 3D ICs. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD'04). 306--313.
[26]
Coskun, A. K., Rosing, T. S., and Whisnant, K. 2007. Temperature aware task scheduling in MPSoCs. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'07).
[27]
Coskun, A. K., Rosing, T. S., Whisnant, K., and Gross, K. C. 2008a. Temperature-Aware MPSoC scheduling for reducing hot spots and gradients. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC'08). 49--54.
[28]
Coskun, A. K., Rosing, T. S., and Gross, K. C. 2008b. Temperature management in multiprocessor SoCs using online learning. In Proceedings of the Design Automation Conference (DAC'08). 890--893.
[29]
Coksun, A. K., Rosing, T. S., Alonso, D. A., Leblebici, J., and Ayala, J. 2009. Dynamic thermal management in 3D multicore architectures. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'09).
[30]
Dadvar, P. and Skandron, K. 2005. Potential thermal security risks. In Proceedings of the IEEE Semiconductor Thermal Measurement, Modeling and Management Symposium (SEMI-THERM'05). 229--234.
[31]
Donald, J. and Martonosi, M. 2005. Leveraging simultaneous multithreading for adaptive thermal control. In Proceedings of the 2nd TACS Workshop.
[32]
Donald, J. and Martonosi, M. 2006. Techniques for multicore thermal management: Classification and new exploration. In Proceedings of the 33rd Annual International Symposium on Computer Architecture (ISCA'06). 78--88.
[33]
EE Times. 2008. The truth about last year's Xbox 360 recall. http://www.eetimes.com/electronics-news/4077187/The-truth-about-last-year-s-Xbox-360-recall.
[34]
Ekpanyapong, M., Healy, M. B., Ballapuram, C. S., Lim, S. K., Lee, H. H. S., and Loh, G. H. 2004. Thermal-Aware 3D microarchitectural floorplanning. Tech. rep. GIT-CERCS-04-37, Georgia Institute of Technology.
[35]
Flautner, K., Kim, N. S., Martin, S., Blaauw, D., and Mudge, T. 2002. Drowsy caches: Simple techniques for reducing leakage power. In Proceedings of the International Symposium on Computer Architecture (ISCA'02).
[36]
Ghosh, S., Choi, J. H., Ndai, P., and Roy, K. 2008. O2 C: Occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors. In Proceedings of the International Symposium on Low Power Electronics and Design (ISPLED'08). 189--192.
[37]
Goplen, B. and Sapatnekar, S. 2003. Efficient thermal placement of standard cells in 3D ICs using a force directed approach. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD'03). 86--89.
[38]
Gunther, S. H., Binns, F., Carmean, D. M., and Hall, J. C. 2001. Managing the impact of increasing microprocessor power consumption. Intel Tech. J. 5, 1.
[39]
Gwennap, L. 2010. Sandy bridge sparse generations. Microprocessor rep. www.MPRonline.com
[40]
Han, Y. and Koren, I. 2007. Simulated annealing based temperature aware floorplanning. The J. Low Power Electron. 3, 2, 1--15.
[41]
Hasan, J., Jalote, A., Vijaykumar, T. N., and Brodley, C. E. 2005. Heat stroke: Power-Density-Based denial of service in SMT. In Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA'05).
[42]
Healy, M. B., Vittes, M., Ekpanyapong, M., Ballamuram, C. S., Lim, S. K., Lee, H. H. S., and Loh, G. H. 2007. Multiobjective microarchitectural floorplanning for 2D and 3D ICs. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 26, 1, 38--52.
[43]
Heo, S., Barr, K., and Asanovi'c, K. 2003. Reducing power density through activity migration. In Proceedings of the International Symposium on Low Power Electronics and Design (ISPLED'03). 217--222.
[44]
Hsu, C.-H. and Kremer, U. 2003. The design, implementation and evaluation of a compiler algorithm CPU energy reduction. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI'03).
[45]
Huang, M., Renau, J., Yoo, S.-M., and Torrellas, J. 2000. A framework for dynamic energy efficiency and temperature management. In Proceedings of the International Symposium on Microarchitecture (MICRO'00).
[46]
Huang, W., Sankaranarayanan, K., Skadron, K., Ribando, R. J., and Stan, M. R. 2008. Accurate, pre-RTL temperature aware processor design using a parameterized, geometric thermal model. IEEE Trans. Comput. 57, 9, 1277--1288.
[47]
Hung, W.-L., Addo-Quaye, C., Theocharides, T., Xie, Y., Vijaykrishnan, N., and Irwin, M. J. 2004. Thermal-Aware IP virtualization and placement for networks-on-chip architecture. In Proceedings of the International Conference on Computer Design (ICCD'04). 430--437.
[48]
Hung, W.-L., Xie, Y., Vijaykrishnan, N., Addo-Quaye, C., Theocharides, T., and Irwin, M. J. 2005. Thermal-Aware floorplanning using genetic algorithms. In Proceedings of the International Symposium on Quality Electronic Design (ISQED'05). 634--639.
[49]
Intel. 2002. Intel Pentium 4 processor in the 478-pin package thermal design guidelines. Design guide. May.
[50]
Intel. 2003. Intel Pentium M proceesor datasheet. June.
[51]
Intel. 2008. Intel Turbo Boost technology in Intel Core microarchitecture (Nehalem) based processors. Intel white paper. November.
[52]
Intel. 2010. Intel Core2 duo processor E8000 and E7000 series, Intel Pentium dual-core processor E6000 and E5000 series, and Intel Celeron processor E3× 00 series thermal and mechanical design guidelines. April.
[53]
Isci, C. and Martonosi, M. 2003. Runtime power monitoring in high-end processors: Methodology and empirical data. In Proceedings of the International Symposium on Microarchitecture (MICRO'03).
[54]
Jaffari, J. and Anis, M. 2008. Statistical thermal profile considering process variations: Analysis and applications. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 27, 6, 1027--1040.
[55]
Jang, H. B., Yoon, I., Kim, C. H., Shin, S., and Chung, S. W. 2009. The impact of liquid cooling in 3D multicore processors. In Proceedings of the IEEE International Conference on Computer Design (ICCD'09). 472--478.
[56]
Jang, H. B., Choi, J., Yoon, I., Lim, S.-S., Shin, S., Chang, N., and Chung, S. W. 2010. Exploiting application-dependent ambient temperature for accurate architectural simulation. In Proceedings of the IEEE International Conference on Computer Design (ICCD'10).
[57]
Jayaseelan, R. and Mitra, T. 2009. Temperature aware scheduling for embedded processors. In Proceedings of the 22nd International Conference on VLSI Design. 541--546.
[58]
John, J. K., Hu, J. S., and Ziavras, S. G. 2005. Optimizing the thermal behavior of subarrayed data caches. In Proceedings of the IEEE International Conference on Computer Design (ICCD'05).
[59]
Joshi, A. M., Eeckhout, L., John, L. K., and Isen, C. 2008. Automated microprocessor stressmark generation. In Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA'08). 229--239.
[60]
Jung, H. and Pedram, M. 2006. Stochastic dynamic thermal management: A Markovian decision-based approach. In Proceedings of the IEEE International Conference on Computer Design (ICCD'06).
[61]
Jung, H. and Pedram, M. 2008. A stochastic local hot spot alerting technique. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC'08). 468--473.
[62]
Kalman, R. E. 1960. A new approach to linear filtering and prediction problem. J. Basic Engin. 82, series D.
[63]
Kaxiras, S., Hu, Z., and Martonosi, M. 2001. Cache decay: Exploiting generational behavior to reduce cache leakage power. In Proceedings of the International Symposium on Computer Architecture (ISCA'01).
[64]
Khan, O. and Kundu, S. 2008. A framework for predictive dynamic temperature management of microprocessor systems. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD'08). 258--263.
[65]
Kong, J., John, J. K., Chung, E.-Y., Hu, J., and Chung, S. W. 2010. On the thermal attack in instruction caches. IEEE Trans. Depend. Secur. Comput. 7, 2, 217--223.
[66]
Koo, J., Im, S., Jiang, L., and Goodson, K. 2005. Integrated microchannel cooling for three-dimensional electronic circuit architectures. J. Heat Transfer 127, 49--58.
[67]
Ku, J. C., Ozdemir, S., Memik, G., and Ismail, Y. 2005. Thermal management of on-chip caches through power density minimization. In Proceedings of the International Symposium on Microarchitecture (MICRO'05).
[68]
Kumar, A., Shang, L., Peh, L.-S., and Jha, N. K. 2006. HybDTM: A coordinated hardware-software approach for dynamic thermal management. In Proceedings of the 43rd Annual Design Automation Conference (DAC'06). 548--553.
[69]
Kumar, A., Shang, L., Peh, L.-S., and Jha, N. K. 2008. System-Level dynamic thermal management for high-performance microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 27, 1, 96--108.
[70]
Kursun, E. and Cher, C.-Y. 2008. Variation-Aware thermal characterization and management of multi-core architectures. In Proceedings of the IEEE International Conference on Computer Design (ICCD'08). 280--285.
[71]
Lee, J. S., Skadron, K., and Chung, S. W. 2010. Predictive temperature-aware DVFS. IEEE Trans. Comput. 59, 1, 127--133.
[72]
Lee, K.-J. and Skadron, K. 2005. Using performance counters for runtime temperature sensing in high-performance processors. In Proceedings of the Workshop on High-Performance Power-Aware Computing (HP-PAC'05), in conjunction with the International Parallel and Distributed Processing Symposium.
[73]
Lee, K. J., Skadron, K., and Huang, W. 2005. Analytical model for sensor placement on microprocessors. In Proceedings of the IEEE International Conference on Computer Design (ICCD'05). 24--30.
[74]
Lee, W., Patel, K., and Pedram, M. 2006. Dynamic thermal management for MPEG-2 decoding. In Proceedings of the International Symposium on Low Power Electronics and Design (ISPLED'06). 316--321.
[75]
Lee, W., Patel, K., and Pedram, M. 2008. GOP-Level dynamic thermal management in MPEG-2 decoding. IEEE Trans. VLSI 16, 6, 662--672.
[76]
Li, L., Kadayif, I., Tsai, Y.-F., Vijaykrishnan, N., Kandemir, M., Irwin, M. J., and Sivasubramaniam, A. 2002. Leakage energy management in cache hierarchies. In Proceedings of the 11th International Conference on Parallel Architectures and Compilation Techniques (PACT'02).
[77]
Li, X., Ma, Y., and Hong, X. 2009. A novel thermal optimization flow using incremental floorplanning for 3D ICs. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC'09). 347--352.
[78]
Li, Y., Lee, B. C., Brooks, D., Hu, Z., and Skadron, K. 2006. CMP design space exploration subject to physical constraints. In Proceedings of the 12th IEEE International Symposium on High-Performance Computer Architecture (HPCA'06). 15--26.
[79]
Lim, C. H., Robert Daasch, W., and Cai, G. 2002. A thermal-aware superscalar microprocessor. In Proceedings of the International Symposium on Quality Electronic Design (ISQED'02). 517--522.
[80]
Long, J., Memik, S. O., Memik, G., and Mukherjee, R. 2008. Thermal monitoring mechanisms for chip multiprocessors. ACM Trans. Archit. Code Optimiz. 5, 2.
[81]
Lu, Z., Lach, J., Stan, M., and Skadron, K. 2003. Reducing multimedia decode power using feedback control. In Proceedings of the International Conference on Computer Design (ICCD'03). 489--497.
[82]
Lu, Z., Lach, J., Stan, M., and Skadron, K. 2005. Improved thermal management with reliability banking. IEEE Micro 25, 6, 40--49.
[83]
Memik, S. O., Mukherjee, R., Ni, M., and Long, J. 2008. Optimizing thermal sensor allocation for microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 27, 3, 516--527.
[84]
Merkel, A., Bellosa, F., and Weissel, A. 2005. Event-Driven thermal management in SMP systems. In Proceedings of the 2nd Workshop on Temperature-Aware Computer Systems (TACS'05).
[85]
Merkel, A. and Bellosa, F. 2008. Task activity vectors: A new metric for temperature-aware scheduling. In Proceedings of the 3rd ACM SIGOPS EuroSys Conference.
[86]
Mesa-Martinez, F. J., Ardestani, E. K., and Renau, J. 2010. Characterizing processor thermal behavior. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'10). 193--204.
[87]
Michaud, P. and Sazeides, Y. 2007. ATMI: Analytical model of temperature in microprocessors. In Proceedings of the 3rd Annual Workshop on Modeling, Benchmarking and Simulation (MoBS'07).
[88]
Monchiero, M., Canal, R., and Gonzalez, A. 2006. Design space exploration for multicore architectures: A power/performance/thermal view. In Proceedings of the 20th Annual International Conference on Supercomputing (ICS'06). 177--186.
[89]
Mukherjee, R. and Memik, S. O. 2006a. Systematic temperature sensor allocation and placement for multiprocessors. In Proceedings of the Design Automation Conference (DAC'06). 542--547.
[90]
Mukherjee, R. and Memik, S. O. 2006b. Physical aware frequency selection for dynamic thermal management in multi-core systems. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD'06). 547--552.
[91]
Mulas, F., Pittau, M., Buttu, M., Carta, S., Acquaviva, A., Benini, L., Atienza, D., and Micheli, G. D. 2008. Thermal balancing policy for streaming computing on multiprocessor architectures. In Proceedings of the Design Automation and Test in Europe Conference and Exhibition (DATE'08). 734--739.
[92]
Murali, S., Mutapcic, A., Atienza, D., Gupta, R., Boyd, S. P., Benini, L., and Micheli, G. D. 2008. Temperature control of high-performance multi-core platforms using convex optimization. In Proceedings of the Design Automation and Test in Europe Conference and Exhibition (DATE'08). 110--115.
[93]
Mutyam, M., Li, F., Vijaykrishnan, N., Kandemir, M. T., and Irwin, M. J. 2006. Compiler-Directed thermal management for VLIW functional units. In Proceedings of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06). 163--172.
[94]
Narayanan, S. H. K., Kandemir, M., and Ozturk, O. 2006. Compiler-Directed power density reduction in NoC-based multi-core designs. In Proceedings of the International Symposium on Quality Electronic Design (ISQED'06).
[95]
Naveh, A., Rotem, E., Mendelson, A., Gochman, S., Chabukswar, R., Krishnan, K., and Kumar, A. 2006. Power and thermal management in the Intel core duo processor. Intel Tech. J. 10, 2.
[96]
Obermeier, B. and Johannes, F. 2004. Temperature aware global placement. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC'04). 143--148.
[97]
Patel, K., Lee, W., and Pedram, M. 2007. Active bank switching for temperature control of the register file in a microprocessor. In Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI'07). 231--234.
[98]
Pollack, F. 1999. New microarchitecture challenges in the coming generations of CMOS process technologies. In International Symposium on Microarchitecture (MICRO'99). Keynote speech.
[99]
Powell, M. D., Gomaa, M., and Vijaykumar, T. N. 2004. Heat-and-Run: Leveraging SMT and CMP to manage power density through the operating system. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'04). 260--270.
[100]
Powell, M. D. and Vijaykumar, T. N. 2007. Resource area dilation to reduce power density in throughput servers. In Proceedings of the International Symposium on Low Power Electronics and Design (ISPLED'07). 268--273.
[101]
Puterman, M. L. 1994. Markov Decision Processes: Discrete Stochastic Dynamic Programming. Wiley, New York.
[102]
Puttaswamy, K. and Loh, G. H. 2007. Thermal herding: Microarchitecture techniques for controlling hotspots in high-performance 3D-integrated processors. In Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA'07). 193--204.
[103]
Raju, U., Kaisare, A., Agonafer, D., Haji-Sheikh, A., Chrysler, G., and Mahajan, R. 2008. Multi-Objective optimization entailing computer architecture and thermal design for nonuniformly powered microprocessors. In Proceedings of the 11th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM'08).
[104]
Remarsu, S. and Kundu, S. 2009. On process variation tolerant low cost thermal sensor design in 32nm CMOS technology. In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI'09). 487--492.
[105]
Rotem, E., Naveh, A., Moffie, M., and Mendelson, A. 2004. Analysis of thermal monitor features of the Intel Pentium M processor. In Proceedings of the Workshop on Temperature-Aware Computer Systems (TACS'04).
[106]
Sankaranarayanan, K., Velusamy, S., Stan, M. R., and Skadron, K. 2005. A case for thermal-aware floorplanning at the microarchitectural level. The J. Instruct. Level Parallel. 7.
[107]
Sankaranarayanan, K., Huang, W., Stan, M. R., Haj-Hariri, H., Ribando, R. J., and Skadron, K. 2009. Granularity of microprocessor thermal management: A technical report. Tech. rep. CS-2009-03, University of Virginia, Department of Computer Science. April.
[108]
Schafer, B. C. and Kim, T. 2007. Thermal-Aware instruction assignment for VLIW processors. In Proceedings of the 11th Workshop on Interaction between Compilers and Computer Architectures (INTERACT'07). 1--7.
[109]
Sharifi, S., Liu, C., and Rosing, T. S. 2008. Accurate temperature estimation for efficient thermal management. In Proceedings of the International Symposium on Quality Electronic Design (ISQED'08). 137--142.
[110]
Shin, D., Kim, J., Choi, J., Chung, S. W., Chung, E.-Y., and Chang, N. 2009. Energy-Optimal dynamic thermal management for green computing. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD'09).
[111]
SIA. 2009. International technology roadmap for semiconductors (ITRS). http://www.itrs.netreports.html.
[112]
Skadron, K. Abdelzaher, T., and Stan, M. R. 2002. Control-Theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management. In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA'02).
[113]
Skadron, K., Stan, M. R., Huang, W., Velusamy, S., Sankaranarayanan, K., and Tarjan, D. 2003. Temperature-Aware microarchitecture. In Proceedings of the International Symposium on Computer Architecture (ISCA'03).
[114]
Skadron, K., Sankaranarayanan, K., Velusamy, S., Tarjan, D., Stan, M. R., and Huang, W. 2004. Temperature-Aware microarchitecture: Modeling and implementation. ACM Trans. Archit. Code Optimiz. 1, 1, 94--125.
[115]
Skadron, K. 2004. Hybrid architectural dynamic thermal management. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'04). Vol. 1.
[116]
Srinivasan, J. and Adve, S. V. 2003. Predictive dynamic thermal management for multimedia applications. In Proceedings of the International Conference on Supercomputing (ICS'03).
[117]
Srinivasan, J., Adve, S. V., Bose, P., and Rivers, J. A. 2004. The case for lifetime reliability-aware microprocessors. In Proceedings of the 31st International Symposium on Computer Architecture (ISCA'04).
[118]
Srinivasan, J., Adve, S. V., Bose, P., and Rivers, J. A. 2005. Exploiting structural duplication for lifetime reliability enhancement. In Proceedings of the 32nd International Symposium on Computer Architecture (ISCA'05).
[119]
Sun, C., Shang, L., and Dick, R. P. 2007. Three-Dimensional multiprocessor system-on-chip thermal optimization. In Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'07). 117--122.
[120]
Tiwari, A. and Torrellas, J. 2008. Facelift: Hiding and slowing down aging in multicores. In Proceedings of the International Symposium on Microarchitecture (MICRO'08). 129--140.
[121]
Vazirani, V. V. 2001. Approximation Algorithms. Springer.
[122]
Venkatachalam, V. and Franz, M. 2005. Power reduction techniques for microprocessor systems. ACM Comput. Surv. 37, 3, 195--237.
[123]
Ware, M., Rajamani, K., Floyd, M., Brock, B., Rubio, J. C., Rawson, F., and Carter, J. B. 2010. Architecting for power management: The IBM POWER7 approach. In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA'10).
[124]
Wilkerson, P., Raman, A., and Turowski, M. 2004. Fast, automated thermal simulation for three-dimensional integrated circuits. In Proceedings of the 11th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM'04).
[125]
Winter, J. A. and Albonesi, D. H. 2008. Addressing thermal non-uniformity in SMT workloads. ACM Trans. Archit. Code Optimiz. 5, 1.
[126]
Wong, D. F. and Liu, D. L. 1986. A new algorithm for floorplan design. In Proceedings of the Design Automation Conference (DAC'86). 101--107.
[127]
Yang, J., Zhou, X., Chrobak, M., Zhang, Y., and Jin, L. 2008. Dynamic thermal management through task scheduling. In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'08). 191--201.
[128]
Yeo, I., Lee, H. K., Kim, E. J., and Yum, K. H. 2007. Effective dynamic thermal management for MPEG-4 decoding. In Proceedings of the International Conference on Computer Design (ICCD'07). 623--628.
[129]
Yeo, I. and Kim, E. J. 2008. Hybrid dynamic thermal management based on statistical characteristics of multimedia applications. In Proceedings of the International Symposium on Low Power Electronics and Design (ISPLED'08). 321--326.
[130]
Yuan, L. and Qu, G. 2007. ALT-DVS: Dynamic voltage scaling with awareness of leakage and temperature for real-time systems. In Proceedings of the 2nd NASA/ESA Conference on Adaptive Hardware and Systems (AHS'07). 660--670.
[131]
Zanini, F., Atienza, D., and Micheli, G. D. 2009. A control theory approach for thermal balancing of MPSoC. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC'09). 37--42.
[132]
Zhang, Y. and Srivastava, A. 2009. Accurate temperature estimation using noisy thermal sensors. In Proceedings of the Design Automation Conference (DAC'09). 472--477.
[133]
Zhou, P., Ma, Y., Li, Z., Dick, R. P., Shang, L., Zhou, H., Hong, X., and Zhou, Q. 2007. 3D-STAF: Scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits. In Proceedings of the IEEE/ACM International Conference on Computer Aided Design (ICCAD'07). 590--597.
[134]
Zhou, X., Xu, Y., Du, Y., Zhang, Y., and Yang, J. 2008. Thermal management for 3D processors via task scheduling. In Proceedings of the 37th International Conference on Parallel Processing (ICPP'08). 115--122.
[135]
Zhu, C., Gu, Z., Shang, L., Dick, R. P., and Joseph, R. 2008. Three-Dimensional chip multiprocessor run-time thermal management. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 27, 8, 1479--1492.

Cited By

View all

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Computing Surveys
ACM Computing Surveys  Volume 44, Issue 3
June 2012
344 pages
ISSN:0360-0300
EISSN:1557-7341
DOI:10.1145/2187671
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 14 June 2012
Accepted: 01 October 2010
Revised: 01 September 2010
Received: 01 May 2010
Published in CSUR Volume 44, Issue 3

Permissions

Request permissions for this article.

Check for updates

Author Tags

  1. Thermal management
  2. microprocessor
  3. performance and reliability

Qualifiers

  • Research-article
  • Research
  • Refereed

Funding Sources

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)220
  • Downloads (Last 6 weeks)20
Reflects downloads up to 17 Jan 2025

Other Metrics

Citations

Cited By

View all

View Options

Login options

Full Access

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media