Thread scheduling for heterogeneous multicore processors using phase identification

Heterogeneous multicore processors (HMPs) offer promise for significant efficiency improvement. Power-effcient cores can be paired with higher performance cores in an HMP to achieve a beneficial design in terms of both power and performance. However, such processors produce challenges in the effective mapping of threads to cores. An application could have very different behavior and performance when executing on cores of different types. The behavior of typical applications also vary with their phases of execution. Thus, the type of core providing the best performance for an application may depend on the current phase. In this work, we highlight the correlation between execution phases of an application and the performance of those phases on particular core types. We propose mechanisms that identify program phases, exploit the performance behavior of these phases to make effective scheduling decisions, and reuse the result of these scheduling decisions on future occurrences of the same program phases.