skip to main content
10.1145/2108616.2108668acmconferencesArticle/Chapter ViewAbstractPublication PagesicuimcConference Proceedingsconference-collections
research-article

Cache conscious trees on modern microprocessors

Published: 14 January 2010 Publication History

Abstract

Recent research shows that database performance can be significantly improved by the effective cache utilization of conventional microprocessors. Researchers have modified existing index structures into ones optimized for CPU cache performance in main memory database environments. The Cache Sensitive B+-Tree and recently developed Cache Sensitive T-Tree are the most well-known cache conscious index structures. In this paper, we present an experimental performance study to show how cache conscious trees perform on different types of modern CPU processors. We perform experiment evaluation on basic tree operations, search, range search, and insertion/deletion operation.

References

[1]
A. Ailamaki, et al., "DBMSs On A Modern Processor: Where Does Time Go?," in Proceeding of the 25th International Conference on Very Large Database Systems, 1999, pp. 266--277.
[2]
A. Ailamaki, N. K. Govindaraju, S. Harizopoulos, and D. Manodcha, "Query co-processing on commodity processors," in Proceeding of the 32nd International Conference on Very Large Database Systems, Tutorials, 2006, pp.1267--1267.
[3]
P. Boncz, et al., "Database Architecture Optimized for the new Bottleneck: Memory Access," in Proceeding of the 19th International Conference on Very Large Database Systems, 1999, pp. 54--65.
[4]
A. Ghoting, G. Buehrer, S. Parthasarathy, D. Kim, A. Nguyen, Y. -K. Chen, and P. Dubey, "Cache-conscious frequent pattern mining on modern and emerging processors," The VLDB Journal, Vol.16, No.1, 2007, pp.77--96.
[5]
L. R. Hsu, S. K. Reinhardt, R. Iyer, and S. Makineni, "Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource," in Proceeding of the 15th International Conference on Parallel Architectures and Compilation Techniques, 2006, pp.13--22.
[6]
I.-h. Lee, J. Shim, S.-g. Lee, and J. Chun, "CST-Trees: Cache Sensitive T-Trees", in Proc. of the 12th International Conference on Database Systems for Advanced Applications (DASFAA 2007), pp. 398--409, 2007.
[7]
T. J. Lehman, "A Study of Index Structures for Main Memory Database Management System," in Proceeding of the 12th International Conference on Very Large Database Systems, 1986, pp. 294--303.
[8]
S. Manegold, P. A. Boncz and M. L. Kersten, "Optimizing database architecture for the new bottleneck: memory access," VLDB Journal, Vol.9, No.3, 2000, pp. 231--246.
[9]
J. Rao, et al., "Cache Conscious Indexing for Decision-Support in Main Memory," in Proceeding of the 19th International Conference on Very Large Database Systems, 1999, pp.78--89.
[10]
J. Rao, et al., "Making B+ Trees Cache Conscious in Main Memory," in Proceeding of the 2000 ACM SIGMOD International Conference on Management of Data, 2000, pp. 475--486.
[11]
H. Sutter, "The Free Lunch Is Over: A Fundamental Turn Toward Concurrency in Software," available at http://www.gotw.ca/publications/concurrency-ddj.htm.

Cited By

View all

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
ICUIMC '10: Proceedings of the 4th International Conference on Uniquitous Information Management and Communication
January 2010
550 pages
ISBN:9781605588933
DOI:10.1145/2108616
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

In-Cooperation

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 14 January 2010

Permissions

Request permissions for this article.

Check for updates

Author Tags

  1. CPU cache
  2. CST-tree
  3. T-tree
  4. index structure
  5. main memory
  6. microprocessor

Qualifiers

  • Research-article

Funding Sources

Conference

ICUIMC '10
Sponsor:

Acceptance Rates

Overall Acceptance Rate 251 of 941 submissions, 27%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)0
  • Downloads (Last 6 weeks)0
Reflects downloads up to 14 Sep 2024

Other Metrics

Citations

Cited By

View all

View Options

Get Access

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media