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A low-power digitally-programmable variable gain amplifier in 65 nm CMOS

Published: 18 August 2010 Publication History

Abstract

This paper reports a new topology for a switched-capacitor variable gain amplifier (SC-VGA), which allows discrete-time periodic analog signal generation and in essence fulfils the function of the D/A converter. The proposed circuit exploits a pipelined, cascaded gain stages, which leads to simpler circuit implementation, lower power consumption and reduced kT/C noise, compared to the conventional implementation. The method has the attributes of digital programming and control capability, robustness and reduced area overhead. The two-stage SC-VGA has been fabricated in standard single poly, 65-nm CMOS with the core area of 0.17 mm2 and shows the maximum gain variation of 70 dB and 81 dB linear range, while consuming 11 mW.

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      cover image ACM Conferences
      ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
      August 2010
      458 pages
      ISBN:9781450301466
      DOI:10.1145/1840845
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 18 August 2010

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      Author Tags

      1. dicrete-time amplifier
      2. variable gain amplifier
      3. waveform generator

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