research-article

Timing-aware power-optimal ordering of signals

Authors:

Konstantin Moiseev,

Avinoam Kolodny,

Shmuel WimerAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 13, Issue 4

Article No.: 65, Pages 1 - 17

https://doi.org/10.1145/1391962.1391973

Published: 03 October 2008 Publication History

Abstract

A computationally efficient technique for reducing interconnect active power in VLSI systems is presented. Power reduction is accomplished by simultaneous wire spacing and net ordering, such that cross-capacitances between wires are optimally shared. The existence of a unique power-optimal wire order within a bundle is proven, and a method to construct this order is derived. The optimal order of wires depends only on the activity factors of the underlying signals; hence, it can be performed prior to spacing optimization. By using this order of wires, optimality of the combined solution is guaranteed (as compared with any other ordering and spacing of the wires). Timing-aware power optimization is enabled by simultaneously considering timing criticality weights and activity factors for the signals. The proposed algorithm has been applied to various interconnect layouts, including wire bundles from high-end microprocessor circuits in 65 nm technology. Interconnect power reduction of 17% on average has been observed in such bundles.

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Cited By

Luet Ng LHo Yeap KWan Ching Goh MDakulagi V(2023)Power Consumption in CMOS CircuitsElectromagnetic Field in Advancing Science and Technology10.5772/intechopen.105717Online publication date: 29-Mar-2023
https://doi.org/10.5772/intechopen.105717
Shapira S(2021)Performance Enhancement of Integrated Circuits and Power Devices via Embedded Diamond Heat Management2021 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)10.1109/COMCAS52219.2021.9629062(470-472)Online publication date: 1-Nov-2021
https://doi.org/10.1109/COMCAS52219.2021.9629062
Ogbebor JImoize AAtayero A(2020)Energy Efficient Design Techniques in Next-Generation Wireless Communication NetworksWireless Communications & Mobile Computing10.1155/2020/72353622020Online publication date: 3-Mar-2020
https://dl.acm.org/doi/10.1155/2020/7235362
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Index Terms

Timing-aware power-optimal ordering of signals
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design
2. Hardware
  1. Electronic design automation
    1. Physical design (EDA)

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 13, Issue 4

September 2008

328 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/1391962

Issue’s Table of Contents

Copyright © 2008 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 03 October 2008

Accepted: 01 June 2008

Revised: 01 June 2008

Received: 01 June 2007

Published in TODAES Volume 13, Issue 4

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Cited By

Luet Ng LHo Yeap KWan Ching Goh MDakulagi V(2023)Power Consumption in CMOS CircuitsElectromagnetic Field in Advancing Science and Technology10.5772/intechopen.105717Online publication date: 29-Mar-2023
https://doi.org/10.5772/intechopen.105717
Shapira S(2021)Performance Enhancement of Integrated Circuits and Power Devices via Embedded Diamond Heat Management2021 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)10.1109/COMCAS52219.2021.9629062(470-472)Online publication date: 1-Nov-2021
https://doi.org/10.1109/COMCAS52219.2021.9629062
Ogbebor JImoize AAtayero A(2020)Energy Efficient Design Techniques in Next-Generation Wireless Communication NetworksWireless Communications & Mobile Computing10.1155/2020/72353622020Online publication date: 3-Mar-2020
https://dl.acm.org/doi/10.1155/2020/7235362
Benmoussa YSenn EDerouineau NTizon NBoukhobza J(2018)Joint DVFS and Parallelism for Energy Efficient and Low Latency Software Video DecodingIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2017.277981229:4(858-872)Online publication date: 1-Apr-2018
https://doi.org/10.1109/TPDS.2017.2779812
Benmoussa YBoukhobza JSenn EHadjadj-Aoul YBenazzouz D(2018)A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous SoC and its applicationsJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2014.11.00361:1(49-70)Online publication date: 29-Dec-2018
https://dl.acm.org/doi/10.1016/j.sysarc.2014.11.003
Wang KDong SJiao F(2017)TSF3D: MSV-Driven Power Optimization for Application-Specific 3D Network-on-ChipIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.265098936:7(1089-1102)Online publication date: Jul-2017
https://doi.org/10.1109/TCAD.2017.2650989
Pathania AIrimiea APrakash AMitra T(2015)Power-Performance Modelling of Mobile Gaming Workloads on Heterogeneous MPSoCsProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744894(1-6)Online publication date: 7-Jun-2015
https://dl.acm.org/doi/10.1145/2744769.2744894
Moiseev KKolodny AWimer SMoiseev KKolodny AWimer S(2014)Interconnect Optimization by Net OrderingMulti-Net Optimization of VLSI Interconnect10.1007/978-1-4614-0821-5_8(167-194)Online publication date: 16-Oct-2014
https://doi.org/10.1007/978-1-4614-0821-5_8
Emanuel BWimer SWolansky G(2012)Using well-solvable quadratic assignment problems for VLSI interconnect applicationsDiscrete Applied Mathematics10.5555/2747475.2747482160:4(525-535)Online publication date: 1-Mar-2012
https://dl.acm.org/doi/10.5555/2747475.2747482
Emanuel BWimer SWolansky G(2012)Using well-solvable quadratic assignment problems for VLSI interconnect applicationsDiscrete Applied Mathematics10.1016/j.dam.2011.11.017160:4-5(525-535)Online publication date: Mar-2012
https://doi.org/10.1016/j.dam.2011.11.017
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