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Forming N-detection test sets without test generation

Authors:

Irith Pomeranz,

Sudhakar M. ReddyAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 12, Issue 2

Pages 18 - es

https://doi.org/10.1145/1230800.1230810

Published: 01 April 2007 Publication History

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Abstract

We describe a procedure for forming n-detection test sets for n>1 without applying a test generation procedure to target faults. The proposed procedure accepts a one-detection test set. It extracts test cubes for target faults from the one-detection test set, and merges the test cubes to obtain new test vectors. By extracting and merging different test cubes in different iterations of this process, an n-detection test set is obtained. Merging of test cubes does not require test generation or fault simulation. Fault simulation is required for extracting test cubes for target faults. We demonstrate that the resulting test set is as effective in detecting untargeted faults as an n-detection test set generated by a deterministic test generation procedure. We also discuss the application of the proposed procedure starting from a random test set (instead of a one-detection test set).

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Cited By

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Pomeranz I(2020)RETRO: Reintroducing Tests for Improved Reverse Order Fault SimulationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.299776228:8(1930-1934)Online publication date: Aug-2020
https://doi.org/10.1109/TVLSI.2020.2997762
Wang PGharehbaghi AFujita M(2020)An Automatic Test Pattern Generation Method for Multiple Stuck-At Faults by Incrementally Extending the Test PatternsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.295736439:10(2990-2999)Online publication date: Oct-2020
https://doi.org/10.1109/TCAD.2019.2957364
Hankendi CCoskun A(2017)Scale & CapACM Transactions on Design Automation of Electronic Systems10.1145/299414522:2(1-22)Online publication date: 9-Jan-2017
https://dl.acm.org/doi/10.1145/2994145
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Index Terms

Forming N-detection test sets without test generation
1. Hardware
  1. Hardware test
  2. Robustness

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An n-detection test set detects each target fault n times. A higher value of n increases the likelihood that defects around the site of a target fault will be detected. However, an n-detection test set that consists of single-pattern tests (generated ...

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cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 12, Issue 2

April 2007

222 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/1230800

Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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ACM Journals for the Design of Smart and Connected Systems

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Published: 01 April 2007

Published in TODAES Volume 12, Issue 2

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Pomeranz I(2020)RETRO: Reintroducing Tests for Improved Reverse Order Fault SimulationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.299776228:8(1930-1934)Online publication date: Aug-2020
https://doi.org/10.1109/TVLSI.2020.2997762
Wang PGharehbaghi AFujita M(2020)An Automatic Test Pattern Generation Method for Multiple Stuck-At Faults by Incrementally Extending the Test PatternsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.295736439:10(2990-2999)Online publication date: Oct-2020
https://doi.org/10.1109/TCAD.2019.2957364
Hankendi CCoskun A(2017)Scale & CapACM Transactions on Design Automation of Electronic Systems10.1145/299414522:2(1-22)Online publication date: 9-Jan-2017
https://dl.acm.org/doi/10.1145/2994145
Pomeranz I(2017)Computation of Seeds for LFSR-Based n-Detection Test GenerationACM Transactions on Design Automation of Electronic Systems10.1145/299414422:2(1-13)Online publication date: 4-Jan-2017
https://dl.acm.org/doi/10.1145/2994144
Pomeranz I(2017)LFSR-Based Generation of Multicycle TestsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.258768736:3(503-507)Online publication date: 1-Mar-2017
https://dl.acm.org/doi/10.1109/TCAD.2016.2587687
Pomeranz I(2017)Static Compaction by Merging of Seeds for LFSR-Based Test Generation2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2017.62(314-319)Online publication date: Jul-2017
https://doi.org/10.1109/ISVLSI.2017.62
Fang YYashin VJennings BChiarulli DLevitan S(2016)A Simplified Phase Model for Simulation of Oscillator-Based Computing SystemsACM Journal on Emerging Technologies in Computing Systems10.1145/297674313:2(1-20)Online publication date: 1-Dec-2016
https://dl.acm.org/doi/10.1145/2976743
Pomeranz I(2016)Balancing the Numbers of Detected Faults for Improved Test Set QualityIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.246046335:2(337-341)Online publication date: 1-Feb-2016
https://dl.acm.org/doi/10.1109/TCAD.2015.2460463
Pomeranz I(2016)A Compact Set of Seeds for LFSR-Based Test Generation from a Fully-Specified Compact Test Set2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2016.20(361-366)Online publication date: Jul-2016
https://doi.org/10.1109/ISVLSI.2016.20
Dhiliban C Govindaraju S (2016)Fault simulation and analysis of VLSI circuit using n-detect test sets2016 Online International Conference on Green Engineering and Technologies (IC-GET)10.1109/GET.2016.7916785(1-5)Online publication date: Nov-2016
https://doi.org/10.1109/GET.2016.7916785
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Abstract

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Partitioned n-detection test generation

Non-uniform coverage by n-detection test sets

Multi-pattern n-detection stuck-at test sets for delay defect coverage

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