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Achieving high encoding efficiency with partial dynamic LFSR reseeding

Published: 01 October 2004 Publication History

Abstract

Previous forms of LFSR reseeding have been static (i.e., test application is stopped while each seed is loaded) and have required full reseeding (i.e., the length of the seed is equal to the length of the LFSR). A new form of LFSR reseeding is described here that is dynamic (i.e., the seed is incrementally modified while test application proceeds) and allows partial reseeding (i.e. length of the seed is less than that of the LFSR). In addition to providing better encoding efficiency, partial dynamic LFSR reseeding has a simpler hardware implementation than previous schemes based on multiple-polynomial LFSRs.

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      cover image ACM Transactions on Design Automation of Electronic Systems
      ACM Transactions on Design Automation of Electronic Systems  Volume 9, Issue 4
      October 2004
      144 pages
      ISSN:1084-4309
      EISSN:1557-7309
      DOI:10.1145/1027084
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      Association for Computing Machinery

      New York, NY, United States

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      Publication History

      Published: 01 October 2004
      Published in TODAES Volume 9, Issue 4

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      Author Tags

      1. Built-in self-test
      2. compression
      3. linear finite shift register
      4. reseeding

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