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Distributed power management of real-time applications on a GALS multiprocessor SOC

Published: 04 October 2015 Publication History

Abstract

It is generally desirable to reduce the power consumption of embedded systems. Dynamic Voltage and Frequency Scaling (DVFS) is a commonly applied technique to achieve power reduction at the cost of computational performance. Multiprocessor System on Chips (MPSoCs) can have multiple voltage and frequency domains, e.g. per-core. When DVFS is applied to real-time applications, the effects must be accounted for in the associated formal timing model.
In this work, we contribute our distributed multi-core run-time power-management technique for real-time dataflow applications that uses per-core lookup-tables to select low-power DVFS operating points that meet the application's timing requirement. We describe in detail how timing slack is observed locally at run-time on each core and is used to select a local DVFS operating point that meets the application's timing requirement. We further describe our static off-line formal analysis technique to generate these per-core lookup-tables that link timing slack to low-power DVFS operating points. We provide an experimental analysis of our proposed technique using an H.263 decoder application that is mapped onto an FPGA prototyped hardware platform.

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cover image ACM Conferences
EMSOFT '15: Proceedings of the 12th International Conference on Embedded Software
October 2015
276 pages
ISBN:9781467380799

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IEEE Press

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Published: 04 October 2015

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Author Tags

  1. embedded systems
  2. low-power design
  3. modelling and prediction
  4. multiprocessor systems
  5. real-time systems

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ESWEEK'15
ESWEEK'15: ELEVENTH EMBEDDED SYSTEM WEEK
October 4 - 9, 2015
Amsterdam, The Netherlands

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