research-article

The effect of process variation on device temperature in FinFET circuits

Authors:

Jung Hwan Choi,

Jayathi Murthy,

Kaushik RoyAuthors Info & Claims

ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design

Pages 747 - 751

Published: 05 November 2007 Publication History

Abstract

With technology scaling, devices are increasingly prone to process variations. These variations cause a large spread in leakage power, since it is extremely sensitive to process variations, which in turn results in larger temperature variations across different dies. In this paper, we investigate the temperature variations in FinFET circuits considering variations in following parameters (i) channel length and (ii) body thickness. We estimate temperature variation under process fluctuation by Monte Carlo simulation with thermal models to solve temperature and leakage power self-consistently. The results show that high activity circuits exhibit larger temperature variations since increased temperature increments leakage power and vice versa. It is also shown that under moderate process variation (3σ=10% for channel length and body thickness) and a nominal primary input activity of 0.4, thermal runaway can occur in more than 15% of chips in 28nm FinFET technology, severely degrading manufacturing yield.

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Cited By

Dai XJha N(2017)Improving Convergence and Simulation Time of Quantum Hydrodynamic SimulationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.256430025:1(319-329)Online publication date: 1-Jan-2017
https://dl.acm.org/doi/10.1109/TVLSI.2016.2564300
Chaudhuri SJha N(2016)Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETsACM Journal on Emerging Technologies in Computing Systems10.1145/283291312:4(1-25)Online publication date: 15-Mar-2016
https://dl.acm.org/doi/10.1145/2832913
Carlo SGambardella GPrinetto PRolfo DTrotta P(2015)SATTAACM Transactions on Reconfigurable Technology and Systems10.1145/26590018:1(1-22)Online publication date: 6-Mar-2015
https://dl.acm.org/doi/10.1145/2659001
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The effect of process variation on device temperature in FinFET circuits
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Information

Published In

cover image ACM Conferences

ICCAD '07: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design

November 2007

933 pages

ISBN:1424413826

General Chair:
Georges Gielen
ESAT-MICAS, Katholieke Univ. Leuven, Leuven, Belgium

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CEDA: Council on Electronic Design Automation
SIGDA: ACM Special Interest Group on Design Automation
IEEE CASS/CANDE
IEEE-CS\DATC: IEEE Computer Society

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IEEE Press

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Published: 05 November 2007

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ICCAD07

Sponsor:

CEDA
SIGDA
IEEE-CS\DATC

ICCAD07: The International Conference on Computer-Aided Design 2007

November 5 - 8, 2007

California, San Jose

Acceptance Rates

ICCAD '07 Paper Acceptance Rate 139 of 510 submissions, 27%;

Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

Dai XJha N(2017)Improving Convergence and Simulation Time of Quantum Hydrodynamic SimulationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.256430025:1(319-329)Online publication date: 1-Jan-2017
https://dl.acm.org/doi/10.1109/TVLSI.2016.2564300
Chaudhuri SJha N(2016)Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETsACM Journal on Emerging Technologies in Computing Systems10.1145/283291312:4(1-25)Online publication date: 15-Mar-2016
https://dl.acm.org/doi/10.1145/2832913
Carlo SGambardella GPrinetto PRolfo DTrotta P(2015)SATTAACM Transactions on Reconfigurable Technology and Systems10.1145/26590018:1(1-22)Online publication date: 6-Mar-2015
https://dl.acm.org/doi/10.1145/2659001
Chaudhuri SMishra PJha N(2014)Accurate Leakage/Delay Estimation for FinFET Standard Cells under PVT Variations using the Response Surface MethodologyACM Journal on Emerging Technologies in Computing Systems10.1145/266506611:2(1-20)Online publication date: 18-Nov-2014
https://dl.acm.org/doi/10.1145/2665066
Chaudhuri SJha N(2014)3D vs. 2D Device Simulation of FinFET Logic Gates under PVT VariationsACM Journal on Emerging Technologies in Computing Systems10.1145/256767010:3(1-19)Online publication date: 6-May-2014
https://dl.acm.org/doi/10.1145/2567670
Tang AJha N(2013)Design space exploration of FinFET cacheACM Journal on Emerging Technologies in Computing Systems10.1145/24916789:3(1-16)Online publication date: 8-Oct-2013
https://dl.acm.org/doi/10.1145/2491678
Tang AJha N(2013)Thermal Characterization of Test Techniques for FinFET and 3D Integrated CircuitsACM Journal on Emerging Technologies in Computing Systems10.1145/2422094.24221009:1(1-16)Online publication date: 1-Feb-2013
https://dl.acm.org/doi/10.1145/2422094.2422100
Lee CJha NStok LDutt NHassoun S(2011)CACTI-FinFETProceedings of the 48th Design Automation Conference10.1145/2024724.2024918(866-871)Online publication date: 5-Jun-2011
https://dl.acm.org/doi/10.1145/2024724.2024918
Mishra PJha NDe Micheli GAl-Hashimi BMueller WMacii E(2010)Low-power FinFET circuit synthesis using surface orientation optimizationProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871002(311-314)Online publication date: 8-Mar-2010
https://dl.acm.org/doi/10.5555/1870926.1871002

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