research-article

Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity

Authors:

Kuan-Hsun Chen,

Florian Kriebel,

Muhammad Shafique,

Jorg HenkelAuthors Info & Claims

IEEE Transactions on Computers, Volume 65, Issue 11

Pages 3441 - 3455

https://doi.org/10.1109/TC.2016.2532862

Published: 01 November 2016 Publication History

Abstract

Due to the architectural design, process variations and aging, individual cores in many-core systems exhibit heterogeneous performance. In many-core systems, a commonly adopted soft error mitigation technique is Redundant Multithreading (RMT) that achieves error detection and recovery through redundant thread execution on different cores for an application. However, task mapping and the task execution mode (i.e., whether a task executes in a reliable mode with RMT or unreliable mode without RMT) need to be considered for achieving resource-efficient reliability. This paper explores how to efficiently assign the tasks onto different cores with heterogeneous performance properties and determine the execution modes of tasks in order to achieve high reliability and satisfy the tolerance of timeliness. We demonstrate that the task mapping problem under heterogeneous performance can be solved by employing Hungarian Algorithm as subroutine to efficiently assign the tasks onto the cores to optimize the system reliability with polynomial time complexity. To obtain the efficient task execution modes, we also propose an iterative mode adaptation technique and guarantee the tolerable timing constraint. Our results illustrate that compared to state-of-the-art, the proposed approaches achieve up to $80$ percent reliability improvement (on average $20$ percent) under different scenarios of chip frequency variation maps.

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Cited By

Iskandar VSalama CTaher M(2022)Dynamic thread mapping for power-efficient many-core systems under performance constraintsMicroprocessors & Microsystems10.1016/j.micpro.2022.10461493:COnline publication date: 1-Sep-2022
https://dl.acm.org/doi/10.1016/j.micpro.2022.104614
Shehzad MBashir QFarooq UAhmed GRaza MKumar PKhalid M(2020)Threshold temperature scalingMicroprocessors & Microsystems10.1016/j.micpro.2020.10312477:COnline publication date: 1-Sep-2020
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cover image IEEE Transactions on Computers

IEEE Transactions on Computers Volume 65, Issue 11

November 2016

285 pages

ISSN:0018-9340

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Copyright © 2016.

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IEEE Computer Society

United States

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Published: 01 November 2016

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Cited By

Iskandar VSalama CTaher M(2022)Dynamic thread mapping for power-efficient many-core systems under performance constraintsMicroprocessors & Microsystems10.1016/j.micpro.2022.10461493:COnline publication date: 1-Sep-2022
https://dl.acm.org/doi/10.1016/j.micpro.2022.104614
Shehzad MBashir QFarooq UAhmed GRaza MKumar PKhalid M(2020)Threshold temperature scalingMicroprocessors & Microsystems10.1016/j.micpro.2020.10312477:COnline publication date: 1-Sep-2020
https://dl.acm.org/doi/10.1016/j.micpro.2020.103124
Namazi ASafari SMohammadi SAbdollahi M(2019)SORTACM Transactions on Modeling and Performance Evaluation of Computing Systems10.1145/33228994:2(1-25)Online publication date: 13-Jun-2019
https://dl.acm.org/doi/10.1145/3322899
Oz IArslan S(2019)A Survey on Multithreading Alternatives for Soft Error Fault ToleranceACM Computing Surveys10.1145/330225552:2(1-38)Online publication date: 27-Mar-2019
https://dl.acm.org/doi/10.1145/3302255
Yuan BLi BChen HZeng ZYao X(2019)Multi-objective redundancy hardening with optimal task mapping for independent tasks on multi-coresSoft Computing - A Fusion of Foundations, Methodologies and Applications10.1007/s00500-019-03937-024:2(981-995)Online publication date: 27-Mar-2019
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Schwarzer TWeichslgartner AGlab MWildermann SBrand PTeich J(2018)Symmetry-Eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core ArchitecturesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.269589437:2(297-310)Online publication date: 1-Feb-2018
https://dl.acm.org/doi/10.1109/TCAD.2017.2695894
Goens ASiccha SCastrillon J(2017)Symmetry in Software SynthesisACM Transactions on Architecture and Code Optimization10.1145/309574714:2(1-26)Online publication date: 21-Jul-2017
https://dl.acm.org/doi/10.1145/3095747

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