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Substrate noise influence on circuit performance in variable threshold-voltage scheme

Authors:

Takayasu SakuraiAuthors Info & Claims

ISLPED '96: Proceedings of the 1996 international symposium on Low power electronics and design

Pages 309 - 312

Published: 12 August 1996 Publication History

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References

[1]

S. Mutoh, T. Douseki, Y. Matsuya, T. Aoki, S. Shigematsu, and J. Yamada, "I-V power supply highspeed digital circuit technology with multithresholdvoltage CMOS," 1EEE J. Solid-State Circuits, vol. 30, no. 8, pp. 847-854, Aug. 1995.

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[2]

T. Kuroda and T. Sakurai, "Threshold-voltage control schemes through substrate-bias for low-power highspeed CMOS LSI design," to be published in Kluwer J. of VLSI Signal Processing, special issues on technologies for wireless computing, 1996.

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[3]

T. Kuroda, T. Fujita, S. Mira, T. Nagamatu, S. Yoshioka, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu and T. Sakurai, "A 0.9V 150MHz 10roW 4ram2 2-D discrete cosine transform core processor with variable-thresholdvoltage scheme," in 1SSCC Dig. of Tech. Papers, pp. 166-167, Feb. 1996.

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[4]

T. Kuroda, T. Fujita, T. Nagamatu, S. Yoshioka, T. Sei, K. Matsuo, Y. Hamura, T. Mori, M. Murota, M. Kakumu and T. Sakurai, "A high-speed low-power 0.3~m CMOS gate array with variable hreshold voltage (VT) scheme," in Proc. of CICC'96, pp. 53- 56, May 1996.

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[5]

M. Matsui, H. Hara, K. Seta, Y. Uetani, L. S. Kim, T. Nagamatsu, T. Shimazawa, S. Mira, G. Otomo, T. Oto, Y. Watanabe, F. Sano, A. Chiba, K. Matsuda and T. Sakurai, "200MHz video compression macrocells using low-swing differential logic," in ISSCC Dig. of Tech. Papers, pp. 76-77, Feb. 1994.

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Yasuda THosokawa KYasuura H(2003)A low power CMOS circuit with Variable Souce Scheme (VSCMOS)Proceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119852(404-407)Online publication date: 21-Jan-2003
https://dl.acm.org/doi/10.1145/1119772.1119852
Sakurai TKawaguchi HKuroda TBarton BPedram MChandrakasan AKiaei S(1997)Low-power CMOS design through VTH control and low-swing circuitsProceedings of the 1997 international symposium on Low power electronics and design10.1145/263272.263273(1-6)Online publication date: 1-Aug-1997
https://dl.acm.org/doi/10.1145/263272.263273

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Substrate noise influence on circuit performance in variable threshold-voltage scheme
1. Hardware

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Published In

ISLPED '96: Proceedings of the 1996 international symposium on Low power electronics and design

August 1996

390 pages

ISBN:0780335716

Publisher

IEEE Press

Publication History

Published: 12 August 1996

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ISLPED96

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SIGDA
IEEE-SSCS
IEEE-CAS

ISLPED96: 1996 International Symposium on Low Power Electronics & Design

August 12 - 14, 1996

California, Monterey, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

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Yasuda THosokawa KYasuura H(2003)A low power CMOS circuit with Variable Souce Scheme (VSCMOS)Proceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119852(404-407)Online publication date: 21-Jan-2003
https://dl.acm.org/doi/10.1145/1119772.1119852
Sakurai TKawaguchi HKuroda TBarton BPedram MChandrakasan AKiaei S(1997)Low-power CMOS design through VTH control and low-swing circuitsProceedings of the 1997 international symposium on Low power electronics and design10.1145/263272.263273(1-6)Online publication date: 1-Aug-1997
https://dl.acm.org/doi/10.1145/263272.263273

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Threshold voltage degradation under high Vgs and low Vds on 200V SOI power devices

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