SOI Transistor Model for Fast Transient Simulation

Progress in semiconductor process technology has made SOItransistors one of the most promising candidates for high performanceand low power designs. With smaller diffusion capacitances,SOI transistors switch significantly faster than theirtraditional bulk MOS counterparts and consume less power perswitching. However, design and simulation of SOI MOS circuits ismore challenging due to more complex behavior of an SOI transistorinvolving floating body effects, delay dependence on history oftransistor switching, bipolar effect and others. This paper isdevoted to developing a fast table model of SOI transistors, suitablefor use in fast transistor level simulators. We propose usingbody charge instead of body potential as an independent variableof the model to improve convergence of circuit simulation integrationalgorithm. SOI transistor has one additional terminal comparedwith the bulk MOSFET and hence requires larger tables tomodel. We propose a novel transformation to reduce number oftable dimensions and as a result to make the size of the tables reasonable.The paper also presents efficient implementation of ourSOI transistor table model using piece-wise polynomial approximation,nonuniform grid discretization, and splitting the transistormodel into the model of its equilibrium and non equilibrium states.The effectiveness of the proposed model is demonstrated byemploying it in a fast transistor level simulator to simulate highperformance industrial SOI microprocessor circuits.