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ORCIDWolfgang Fichtner
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- affiliation: ETH Zurich, Switzerland
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2010 – 2019
- 2012
[j66]Satoshi Ono, Mauro Ciappa, Shigeru Hiura, Wolfgang Fichtner:
Electro-thermal simulation in the time domain of GaN HEMT for RF switch-mode amplifier. Microelectron. Reliab. 52(9-10): 2224-2227 (2012)- 2011
- [j65]Vezio Malandruccolo, Mauro Ciappa, Hubert Rothleitner, Wolfgang Fichtner:
A New Built-In Defect-Based Testing Technique to Achieve Zero Defects in the Automotive Environment. J. Electron. Test. 27(1): 19-30 (2011) - [j64]Mauro Ciappa, Luigi Mangiacapra, Maria Stangoni, Stephan Ott, Wolfgang Fichtner:
Design of optimum electron beam irradiation processes for the reliability of electric cables used in critical applications. Microelectron. Reliab. 51(9-11): 1479-1483 (2011) - [j63]Aniello Esposito, Mauro Ciappa, Wolfgang Fichtner:
Synthesis of scanning electron microscopy images by high performance computing for the metrology of advanced CMOS processes. Microelectron. Reliab. 51(9-11): 1673-1678 (2011) - [c65]Mathieu Luisier, Timothy B. Boykin, Gerhard Klimeck
, Wolfgang Fichtner:
Atomistic nanoelectronic device engineering with sustained performances up to 1.44 PFlop/s. SC 2011: 2:1-2:11 - 2010
- [j62]Mauro Ciappa, Alexander Koschik, Maurizio Dapor, Wolfgang Fichtner:
Modeling secondary electron images for linewidth measurement by critical dimension scanning electron microscopy. Microelectron. Reliab. 50(9-11): 1407-1412 (2010) - [j61]Yuji Sasaki, Mauro Ciappa, Takayuki Masunaga, Wolfgang Fichtner:
Accurate extraction of the mechanical properties of thin films by nanoindentation for the design of reliable MEMS. Microelectron. Reliab. 50(9-11): 1621-1625 (2010) - [j60]Vezio Malandruccolo, Mauro Ciappa, Hubert Rothleitner, M. Hommel, Wolfgang Fichtner:
A new built-in screening methodology for Successive Approximation Register Analog to Digital Converters. Microelectron. Reliab. 50(9-11): 1750-1757 (2010) - [j59]Marc Simon Wegmueller, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner:
Signal Transmission by Galvanic Coupling Through the Human Body. IEEE Trans. Instrum. Meas. 59(4): 963-969 (2010) - [c64]Luca Henzen, Wolfgang Fichtner:
FPGA parallel-pipelined AES-GCM core for 100G Ethernet applications. ESSCIRC 2010: 202-205 - [c63]Vezio Malandruccolo, Mauro Ciappa, Wolfgang Fichtner, Hubert Rothleitner:
Novel built-in methodology for defect testing of capacitor oxide in SAR analog to digital converters for critical automotive applications. ETS 2010: 170-174
2000 – 2009
- 2009
- [j58]Stefan Eberli, Andreas Burg, Wolfgang Fichtner:
Implementation of a 2×2 MIMO-OFDM receiver on an application specific processor. Microelectron. J. 40(11): 1642-1649 (2009) - [j57]Mauro Ciappa, Luigi Mangiacapra, Maria Stangoni, Stephan Ott, Wolfgang Fichtner:
Ensuring the reliability of electron beam crosslinked electric cables by the optimization of the dose depth distribution with Monte Carlo simulation. Microelectron. Reliab. 49(9-11): 972-976 (2009) - [j56]Haruka Kubo, Mauro Ciappa, Takayuki Masunaga, Wolfgang Fichtner:
Multiscale simulation of aluminum thin films for the design of highly-reliable MEMS devices. Microelectron. Reliab. 49(9-11): 1278-1282 (2009) - [j55]Vezio Malandruccolo, Mauro Ciappa, Hubert Rothleitner, Wolfgang Fichtner:
A new built-in screening methodology to achieve zero defects in the automotive environment. Microelectron. Reliab. 49(9-11): 1334-1340 (2009) - [j54]Marc Simon Wegmueller, Sonja Huclova, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner:
Galvanic Coupling Enabling Wireless Implant Communications. IEEE Trans. Instrum. Meas. 58(8): 2618-2625 (2009) - [c62]Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner:
Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT. DATE 2009: 646-651 - [c61]Vezio Malandruccolo, Mauro Ciappa, Wolfgang Fichtner, Hubert Rothleitner:
Novel Solution for the Built-in Gate Oxide Stress Test of LDMOS in Integrated Circuits for Automotive Applications. ETS 2009: 67-72 - [c60]Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen:
Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. ISCAS 2009: 789-792 - [c59]Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen:
Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. ISCAS 2009: 793 - [c58]Luca Henzen, Flavio Carbognani, Jean-Philippe Aumasson, Sean O'Neil, Wolfgang Fichtner:
VLSI Implementations of the Cryptographic Hash Functions MD6 and ïrRUPT. ISCAS 2009: 2914-2917 - 2008
- [j53]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 830-836 (2008) - [c57]Peter Luethi, Christoph Studer, Sebastian Duetsch, Eugen Zgraggen, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison. APCCAS 2008: 830-833 - [c56]Mathieu Luisier, Gerhard Klimeck, Andreas Schenk, Wolfgang Fichtner, Timothy B. Boykin:
A Parallel Sparse Linear Solver for Nearest-Neighbor Tight-Binding Problems. Euro-Par 2008: 790-800 - [c55]Christoph Studer, Peter Luethi, Wolfgang Fichtner:
VLSI architecture for data-reduced steering matrix feedback in MIMO systems. ISCAS 2008: 300-303 - [c54]Christian Senning, Christoph Studer, Peter Luethi, Wolfgang Fichtner:
Hardware-efficient steering matrix computation architecture for MIMO communication systems. ISCAS 2008: 304-307 - [c53]Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner:
FPGA implementation of a 2G fibre channel link encryptor with authenticated encryption mode GCM. SoC 2008: 1-4 - [c52]Peter Luethi, Markus Wenk, Thomas Koch, Wolfgang Fichtner, Michael Lerjen, Norbert Felber:
Multi-user MIMO testbed. WiNTECH 2008: 109-110 - 2007
- [j52]M. Etherton, J. Willemen, Wolfgang Wilkening, Ning Qu, S. Mettler, Wolfgang Fichtner:
Verification of CDM circuit simulation using an ESD evaluation circuit. Microelectron. Reliab. 47(7): 1036-1043 (2007) - [j51]Ulrich Glaser, Kai Esmark, Martin Streibl, Christian Russ, Krzysztof Domanski, Mauro Ciappa, Wolfgang Fichtner:
SCR operation mode of diode strings for ESD protection. Microelectron. Reliab. 47(7): 1044-1053 (2007) - [j50]Davide Barlini, Mauro Ciappa, Michel Mermet-Guyennet, Wolfgang Fichtner:
Measurement of the transient junction temperature in MOSFET devices under operating conditions. Microelectron. Reliab. 47(9-11): 1707-1712 (2007) - [j49]Alberto Castellazzi, Mauro Ciappa, Wolfgang Fichtner, M. Piton, Michel Mermet-Guyennet:
A study of the threshold-voltage suitability as an application-related reliability indicator for planar-gate non-punch-through IGBTs. Microelectron. Reliab. 47(9-11): 1713-1718 (2007) - [j48]Stefan Röllin, Wolfgang Fichtner:
Improving the Accuracy of GMRes with Deflated Restarting. SIAM J. Sci. Comput. 30(1): 232-245 (2007) - [j47]Marc Simon Wegmueller, Andreas Kuhn, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner:
An Attempt to Model the Human Body as a Communication Channel. IEEE Trans. Biomed. Eng. 54(10): 1851-1857 (2007) - [c51]Flavio Carbognani, Simon Haene, Manuel Arrigo, Claudio Pagnamenta, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication. CICC 2007: 451-454 - [c50]Simon Haene, David Perels, Wolfgang Fichtner:
System-level characterization of a real-time 4×4 MIMO-OFDM transceiver on FPGA. EUSIPCO 2007: 1146-1150 - [c49]C. Hess, Markus Wenk, Andreas Burg, Peter Luethi, Christoph Studer, Norbert Felber, Wolfgang Fichtner:
Reduced-complexity mimo detector with close-to ml error rate performance. ACM Great Lakes Symposium on VLSI 2007: 200-203 - [c48]Marc Simon Wegmueller, Martin Hediger, Thomas Kaufmann, Felix Bürgin, Wolfgang Fichtner:
Wireless Implant Communications for Biomedical Monitoring Sensor Network. ISCAS 2007: 809-812 - [c47]Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner:
FFT Processor for OFDM Channel Estimation. ISCAS 2007: 1417-1420 - [c46]Peter Luethi, Andreas Burg, Simon Haene, David Perels, Norbert Felber, Wolfgang Fichtner:
VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition. ISCAS 2007: 1421-1424 - [c45]David Perels, Christoph Studer, Wolfgang Fichtner:
Implementation of a Low-Complexity Frame-Start Detection Algorithm for MIMO Systems. ISCAS 2007: 1903-1906 - [c44]Andreas Burg, Simon Haene, Wolfgang Fichtner, Markus Rupp:
Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation. ISCAS 2007: 3530-3533 - 2006
- [j46]Marco Buzzo, Mauro Ciappa, Wolfgang Fichtner:
Characterization of photonic devices by secondary electron potential contrast. Microelectron. Reliab. 46(9-11): 1536-1541 (2006) - [j45]Alberto Castellazzi, Mauro Ciappa, Wolfgang Fichtner, G. Lourdel, Michel Mermet-Guyennet:
Compact modelling and analysis of power-sharing unbalances in IGBT-modules used in traction applications. Microelectron. Reliab. 46(9-11): 1754-1759 (2006) - [j44]Davide Barlini, Mauro Ciappa, Alberto Castellazzi, Michel Mermet-Guyennet, Wolfgang Fichtner:
New technique for the measurement of the static and of the transient junction temperature in IGBT devices under operating conditions. Microelectron. Reliab. 46(9-11): 1772-1777 (2006) - [j43]S. C. Brugger, Andreas Schenk, Wolfgang Fichtner:
Moments of the Inverse Scattering Operator of the Boltzmann Equation: Theory and Applications. SIAM J. Appl. Math. 66(4): 1209-1226 (2006) - [c43]Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
GALS at ETH Zurich: Success or Failure. ASYNC 2006: 150-159 - [c42]Felix Bürgin, Flavio Carbognani, Martin Hediger, Hektor Meier, Robert Meyer-Piening, Rafael Santschi, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm. DAC 2006: 558-561 - [c41]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
Two-phase resonant clocking for ultra-low-power hearing aid applications. DATE 2006: 73-78 - [c40]Marc Simon Wegmueller, Wolfgang Fichtner, Michael Oberle, Niels Kuster:
BPSK & QPSK Modulated Data Communication for Biomedical Monitoring Sensor Network. EMBC 2006: 2071-2074 - [c39]Andreas Peter Burg, Markus Wenk, Wolfgang Fichtner:
VLSI implementation of pipelined sphere decoding with early termination. EUSIPCO 2006: 1-5 - [c38]David Perels, Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner:
A Frame-Start Detector for a 4×4 MIMO-OFDM System. ICASSP (4) 2006: 425-428 - [c37]Andreas Burg, Simon Haene, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner:
Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems. ISCAS 2006 - [c36]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
42% power savings through glitch-reducing clocking strategy in a hearing aid application. ISCAS 2006 - [c35]Simon Haene, Andreas Burg, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner:
Silicon implementation of an MMSE-based soft demapper for MIMO-BICM. ISCAS 2006 - [c34]Markus Wenk, Martin Zellweger, Andreas Burg, Norbert Felber, Wolfgang Fichtner:
K-best MIMO detection VLSI architectures achieving up to 424 Mbps. ISCAS 2006 - 2005
- [j42]Andreas Burg, Moritz Borgmann, Markus Wenk, Martin Zellweger, Wolfgang Fichtner, Helmut Bölcskei:
VLSI implementation of MIMO detection using the sphere decoding algorithm. IEEE J. Solid State Circuits 40(7): 1566-1577 (2005) - [j41]Marco Buzzo, Mauro Ciappa, Maria Stangoni, Wolfgang Fichtner:
Two-dimensional Dopant Profiling and Imaging of 4H Silicon Carbide Devices by Secondary Electron Potential Contrast. Microelectron. Reliab. 45(9-11): 1499-1504 (2005) - [j40]Maria Stangoni, Mauro Ciappa, Wolfgang Fichtner:
Assessment of the Analytical Capabilities of Scanning Capacitance and Scanning Spreading Resistance Microscopy Applied to Semiconductor Devices. Microelectron. Reliab. 45(9-11): 1532-1537 (2005) - [j39]Mauro Ciappa, Wolfgang Fichtner, T. Kojima, Y. Yamada, Y. Nishibe:
Extraction of Accurate Thermal Compact Models for Fast Electro-Thermal Simulation of IGBT Modules in Hybrid Electric Vehicles. Microelectron. Reliab. 45(9-11): 1694-1699 (2005) - [c33]Flavio Carbognani, Felix Bürgin, Luca Henzen, Herbert Koch, Hovig Magdassian, Christoph Pedretti, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
A 0.67-mm2 45-μW DSP VLSI implementation of an adaptive directional microphone for hearing aids. ECCTD 2005: 141-144 - [c32]David Perels, Simon Haene, Peter Luethi, Andreas Peter Burg, Norbert Felber, Wolfgang Fichtner, Helmut Bölcskei:
ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs. ESSCIRC 2005: 215-218 - [c31]Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Improving DPA security by using globally-asynchronous locally-synchronous systems. ESSCIRC 2005: 407-410 - [c30]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications. PATMOS 2005: 446-455 - [c29]Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC. FMGALS@MEMOCODE 2005: 133-149 - 2004
- [j38]Marco Buzzo, Markus Leicht, Thomas Schweinböck, Mauro Ciappa, Maria Stangoni, Wolfgang Fichtner:
2D Dopant Profiling on 4H Silicon Carbide P+N Junction by Scanning Capacitance and Scanning Electron Microscopy. Microelectron. Reliab. 44(9-11): 1681-1686 (2004) - [j37]Mauro Ciappa, Maria Stangoni, Wolfgang Fichtner, Elisa Ricci, Andrea Scorzoni:
On the Use of Neural Networks to Solve the Reverse Modelling Problem for the Quantification of Dopant Profiles Extracted by Scanning Probe Microscopy Techniques. Microelectron. Reliab. 44(9-11): 1703-1708 (2004) - [j36]Chiara Corvasce, Mauro Ciappa, Davide Barlini, S. Sponton, Gaudenzio Meneghesso, Wolfgang Fichtner:
Characterization of self-heating effects in semiconductor resistors during transmission line pulses. Microelectron. Reliab. 44(9-11): 1873-1878 (2004) - [c28]Andreas Burg, Markus Wenk, Martin Zellweger, Marc Simon Wegmueller, Norbert Felber, Wolfgang Fichtner:
VLSI implementation of the sphere decoding algorithm. ESSCIRC 2004: 303-306 - [c27]Norbert Pramstaller, Frank K. Gürkaynak, Simon Haene, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Towards an AES crypto-chip resistant to differential power analysis. ESSCIRC 2004: 307-310 - [c26]Frank K. Gürkaynak, Andreas Burg, Norbert Felber, Wolfgang Fichtner, D. Gasser, Franco Hug, Hubert Kaeslin:
A 2 Gb/s balanced AES crypto-chip implementation. ACM Great Lakes Symposium on VLSI 2004: 39-44 - 2003
- [j35]Clemens Czernohous, Wolfgang Fichtner, Daniel Veit, Christof Weinhardt:
Management decision support using long-term market simulation. Inf. Syst. E Bus. Manag. 1(4): 405-423 (2003) - [j34]Fabian M. Bufler, Andreas Schenk, Wolfgang Fichtner:
Proof of a simple time-step propagation scheme for Monte Carlo simulation. Math. Comput. Simul. 62(3-6): 323-326 (2003) - [j33]Maria Stangoni, Mauro Ciappa, Wolfgang Fichtner:
A New Procedure to Define the Zero-Field Condition and to Delineate pn-Junctions in Silicon Devices by Scanning Capacitance Microscopy. Microelectron. Reliab. 43(9-11): 1651-1656 (2003) - [j32]Giovanna Mura, Massimo Vanzi, Maria Stangoni, Mauro Ciappa, Wolfgang Fichtner:
On the behaviour of the selective iodine-based gold etch for the failure analysis of aged optoelectronic devices. Microelectron. Reliab. 43(9-11): 1771-1776 (2003) - [j31]Jürgen Wassner, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Waveform coding for low-power digital filtering of speech data. IEEE Trans. Signal Process. 51(6): 1656-1661 (2003) - [c25]Thomas Villiger, Hubert Kaeslin, Frank K. Gürkaynak, Stephan Oetiker, Wolfgang Fichtner:
Self-Timed Ring for Globally-Asynchronous Locally-Synchronous Systems. ASYNC 2003: 141-150 - [c24]Andreas Burg, Norbert Felber, Wolfgang Fichtner:
A 50 Mbps 4×4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation. ICECS 2003: 332-335 - [c23]Andreas Burg, Frank K. Gürkaynak, Hubert Kaeslin, Wolfgang Fichtner:
Variable delay ripple carry adder with carry chain interrupt detection. ISCAS (5) 2003: 113-116 - 2002
- [j30]Wolfgang Stadler, Kai Esmark, Harald Gossner, Martin Streibl, M. Wendel, Wolfgang Fichtner, Dionyz Pogany, Martin Litzenberger, Erich Gornik:
Device Simulation and Backside Laser Interferometry--Powerful Tools for ESD Protection Development. Microelectron. Reliab. 42(9-11): 1267-1274 (2002) - [j29]Mauro Ciappa, Flavio Carbognani, Paolo Cova, Wolfgang Fichtner:
A Novel Thermomechanics -Based Lifetime Prediction Model for Cycle Fatigue Failure Mechanisms in Power Semiconductors. Microelectron. Reliab. 42(9-11): 1653-1658 (2002) - [j28]Maria Stangoni, Mauro Ciappa, Marco Buzzo, Markus Leicht, Wolfgang Fichtner:
Simulation and Experimental Validation of Scanning Capacitance Microscopy Measurements across Low-doped Epitaxial PN-Junction. Microelectron. Reliab. 42(9-11): 1701-1706 (2002) - [j27]Fabian M. Bufler, Andreas Schenk, Christoph Zechner, Natsuko Inada, Yoshinori Asahi, Wolfgang Fichtner:
Comparison of Single-Particle Monte Carlo Simulation with Measured Output Characteristics of an 0.1µm n-MOSFET. VLSI Design 15(4): 715-720 (2002) - [c22]Thomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems. ASYNC 2002: 181-189 - [c21]Adrian K. Lutz, Jürg Treichler, Frank K. Gürkaynak, Hubert Kaeslin, Gérard Basler, Antonia Erni, Stephan Reichmuth, Pieter Rommens, Stephan Oetiker, Wolfgang Fichtner:
2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis. CHES 2002: 144-158 - 2001
- [j26]Olaf Schenk, Klaus Gärtner, Wolfgang Fichtner, Andreas Stricker:
PARDISO: a high-performance serial and parallel sparse linear solver in semiconductor device simulation. Future Gener. Comput. Syst. 18(1): 69-78 (2001) - [j25]Manfred Stadler, Markus Thalmann, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Design and Verification of a Stack Processor Virtual Component. IEEE Micro 21(2): 69-80 (2001) - [j24]Michael Schenkel, Paul Pfäffli, Wolfgang Wilkening, D. Aemmer, Wolfgang Fichtner:
Substrate potential shift due to parasitic minority carrier injection in smart-power ICs: measurements and full-chip 3D device simulation. Microelectron. Reliab. 41(6): 815-822 (2001) - [j23]H. Yabuhara, Mauro Ciappa, Wolfgang Fichtner:
Diamond-Coated Cantilevers for Scanning Capacitance Microscopy Applications. Microelectron. Reliab. 41(9-10): 1459-1463 (2001) - [j22]Kai Esmark, Wolfgang Stadler, M. Wendel, Harald Gossner, X. Guggenmos, Wolfgang Fichtner:
Advanced 2D/3D ESD device simulation - a powerful tool already used in a pre-Si phase. Microelectron. Reliab. 41(11): 1761-1770 (2001) - [j21]Fabian M. Bufler, P. Douglas Yoder, Wolfgang Fichtner:
Strain-Dependence of Electron Transport in Bulk Si and Deep-Submicron MOSFETs. VLSI Design 13(1-4): 163-167 (2001) - [c20]Jan Thalheim, Norbert Felber, Wolfgang Fichtner:
A new approach for controlling series-connected IGBT modules. ISCAS (3) 2001: 69-72 - 2000
- [j20]Daniel Doswald, Jürg Häfliger, Patrick Blessing, Norbert Felber, Peter Niederer, Wolfgang Fichtner:
A 30-frames/s megapixel real-time CMOS image processor. IEEE J. Solid State Circuits 35(11): 1732-1743 (2000) - [c19]Jens Muttersbach, Thomas Villiger, Wolfgang Fichtner:
Practical Design of Globally-Asynchronous Locally-Synchronous Systems. ASYNC 2000: 52- - [c18]Thomas Roewer, Manfred Stadler, Markus Thalmann, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
A new paradigm for very flexible SONET/SDH IP-modules. CICC 2000: 533-536
1990 – 1999
- 1999
- [c17]Olaf Schenk, Klaus Gärtner, Wolfgang Fichtner:
Scalable Parallel Sparse Factorization with Left-Right Looking Strategy on Shared Memory Multoprocessors. HPCN Europe 1999: 221-230 - [c16]Olaf Schenk, Klaus Gärtner, Wolfgang Fichtner:
Application of Parallel Sparse Direct Methods in Semiconductor Device and Process Simulation. ISHPC 1999: 206-219 - [c15]Manfred Stadler, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, Markus Thalmann:
Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor. ITC 1999: 414-420 - 1998
- [j19]P. Douglas Yoder, Ulrich Krumbein, Klaus Gärtner, Nobuo Sasaki, Wolfgang Fichtner:
Statistical Enhancement of Terminal Current Estimation for Monte Carlo Device Simulation. VLSI Design 6(1-4): 303-306 (1998) - [j18]A. Scholze, Andreas Wettstein, Andreas Schenk, Wolfgang Fichtner:
Self-Consistent Calculations of the Ground State and the Capacitance of a 3D Si/SiO2 Quantum Dot. VLSI Design 8(1-4): 231-235 (1998) - [c14]Manfred Stadler, Markus Thalmann, Thomas Röwer, Norbert Felber, Wolfgang Fichtner:
An embedded stack microprocessor for SDH telecommunication applications. CICC 1998: 17-20 - 1997
- [j17]Reto Zimmermann, Wolfgang Fichtner:
Low-power logic styles: CMOS versus pass-transistor logic. IEEE J. Solid State Circuits 32(7): 1079-1090 (1997) - [j16]P. Douglas Yoder, Klaus Gärtner, Ulrich Krumbein, Wolfgang Fichtner:
Optimized terminal current calculation for Monte Carlo device simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(10): 1082-1087 (1997) - 1996
- [c13]Giorgio Baccarani, Massimo Rudan, M. Lorenzini, Wolfgang Fichtner, J. Litsios, A. Schenk, P. Van Staa, L. Kaeser, A. Kampmann, A. Marmiroli, C. Sala, E. Ravanelli:
Device simulation for smart integrated systems (DESSIS). ICECS 1996: 752-755 - [c12]T. O. Körner, L. H. Bomholt, P. Regli, Wolfgang Fichtner:
Rigorous electromagnetic simulation of CCD cell structures. ICECS 1996: 1000-1004 - 1995
- [c11]Arno Liegmann, Wolfgang Fichtner:
Solving Large Sparse Linear Systems in a Distributed Computing Environment. PP 1995: 496-497 - 1994
- [j15]Reto Zimmermann, Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm. IEEE J. Solid State Circuits 29(3): 303-307 (1994) - [j14]Claude Pommerell, Wolfgang Fichtner:
Memory Aspects and Performance of Iterative Solvers. SIAM J. Sci. Comput. 15(2): 460-473 (1994) - 1993
- [j13]Nancy Hitschfeld-Kahler, Paolo Conti, Wolfgang Fichtner:
Mixed element trees: a generalization of modified octrees for the generation of meshes for the simulation of complex 3-D semiconductor device structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(11): 1714-1725 (1993) - [c10]Heinz Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Reto Zimmermann, Wolfgang Fichtner:
VINCI: Secure Test of a VLSI High-Speed Encryption System. ITC 1993: 782-790 - 1992
- [j12]Claude Pommerell, Marco Annaratone, Wolfgang Fichtner:
A Set of New Mapping and Coloring Heuristics for Distributed-Memory Parallel Processors. SIAM J. Sci. Comput. 13(1): 194-226 (1992) - [j11]Stephan Müller, Kevin Kells, Wolfgang Fichtner:
Automatic rectangle-based adaptive mesh generation without obtuse angles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(7): 855-863 (1992) - [j10]Hans-Rudolf Heeb, Wolfgang Fichtner:
A module generator based on the PQ-tree algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(7): 876-884 (1992) - [c9]Steven J. Seda, Marc G. R. Degrauwe, Wolfgang Fichtner:
Lazy-expansion symbolic expression approximation in SYNAP. ICCAD 1992: 310-317 - [c8]Nancy Hitschfeld, Stephan Müller, Wolfgang Fichtner:
Generation of 3-D Delaunay Meshes for Complex Geometries using Iterative Refinement. IFIP Congress (1) 1992: 388-394 - 1991
- [j9]Lucas S. Heusler, Wolfgang Fichtner:
Transistor sizing for large combinational digital CMOS circuits. Integr. 10(2): 155-168 (1991) - [j8]Gernot Heiser, Claude Pommerell, Jürgen Weis, Wolfgang Fichtner:
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(10): 1218-1230 (1991) - [j7]Paolo Conti, Nancy Hitschfeld-Kahler, Wolfgang Fichtner:
Omega-an octree-based mixed element grid allocator for the simulation of complex 3-D device structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(10): 1231-1241 (1991) - [j6]Josef F. Burgler, William M. Coughran Jr., Wolfgang Fichtner:
An adaptive grid refinement strategy for the drift-diffusion equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(10): 1251-1258 (1991) - [c7]Rumi Zahir, Wolfgang Fichtner:
Specification of timing constraints for controller synthesis. EURO-DAC 1991: 316-322 - [c6]Claude Pommerell, Wolfgang Fichtner:
PILS: an iterative linear solver package for ill-conditioned systems. SC 1991: 588-599
1980 – 1989
- 1989
- [j5]William M. Coughran Jr., Wolfgang Fichtner, Eric H. Grosse:
Extracting transistor changes from device simulations by gradient fitting. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(4): 380-394 (1989) - [j4]Josef F. Burgler, Randolph E. Bank, Wolfgang Fichtner, R. Kent Smith:
A new discretization scheme for the semiconductor current continuity equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(5): 479-489 (1989) - [c5]Alexander Herrigel, Wolfgang Fichtner:
An Analytic Optimization Technique for Placement of Macro-Cells. DAC 1989: 376-381 - [c4]Alexander Herrigel, M. Glaser, Wolfgang Fichtner:
A global floorplanning technique for VLSI layout. ICCD 1989: 92-95 - [c3]Alexander Herrigel, J. Kamm, Wolfgang Fichtner:
Macrocell-level compaction with automatic jog introduction. ICCD 1989: 536-539 - 1988
- [c2]Steven J. Seda, Marc G. R. Degrauwe, Wolfgang Fichtner:
A symbolic analysis tool for analog circuit design automation. ICCAD 1988: 488-491 - 1986
- [c1]Wolfgang Fichtner:
Design of VLSI Systems. Embedded Systems 1986: 6-17 - 1985
- [j3]Ted J. Kowalski, David J. Geiger, Wayne H. Wolf, Wolfgang Fichtner:
The VLSI Design Automation Assistant: From Algorithms to Silicon. IEEE Des. Test 2(4): 33-43 (1985) - [j2]Randolph E. Bank, William M. Coughran Jr., Wolfgang Fichtner, Eric H. Grosse, Donald J. Rose, R. Kent Smith:
Transient Simulation of Silicon Devices and Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(4): 436-451 (1985) - 1982
- [j1]Geoffrey W. Taylor, Wolfgang Fichtner, J. G. Simmons:
A Description of MOS Internodal Capacitances for Transient Simulations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1(4): 150-156 (1982)
Coauthor Index
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