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ORCIDKaveh Aasaraai
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2020 – today
- 2023
[c14]Kaveh Aasaraai
, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers:
Cyclone-NTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms. FPGA 2023: 47- 2022
- [i2]Kaveh Aasaraai, Don Beaver, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela:
FPGA Acceleration of Multi-Scalar Multiplication: CycloneMSM. IACR Cryptol. ePrint Arch. 2022: 1396 (2022) - [i1]Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers:
CycloneNTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms. IACR Cryptol. ePrint Arch. 2022: 1657 (2022)
2010 – 2019
- 2018
- [c13]Jürgen Becker, Viktor K. Prasanna, Markus Weimer, Wayne Luk, Kaveh Aasaraai, Derek Chiou:
RAW 2018 Invited Talks. IPDPS Workshops 2018: 81-82 - 2014
- [c12]Kaveh Aasaraai, Andreas Moshovos:
An Architectural Approach to Characterizing and Eliminating Sources of Inefficiency in a Soft Processor Design. FCCM 2014: 169 - [c11]Kaveh Aasaraai, Andreas Moshovos:
What limits the operating frequency of a soft processor design. ReConFig 2014: 1-6 - 2013
- [c10]Di Wu, Kaveh Aasaraai, Andreas Moshovos:
Low-cost, high-performance branch predictors for soft processors. FPL 2013: 1-6 - 2012
- [j3]Kaveh Aasaraai, Andreas Moshovos:
NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. Int. J. Reconfigurable Comput. 2012: 915178:1-915178:12 (2012) - [c9]Maryam Sadooghi-Alvandi, Kaveh Aasaraai, Andreas Moshovos:
Toward virtualizing branch direction prediction. DATE 2012: 455-460 - [c8]Kaveh Aasaraai, Andreas Moshovos:
SPREX: A soft processor with Runahead execution. ReConFig 2012: 1-7 - 2010
- [c7]Kaveh Aasaraai, Andreas Moshovos:
Design space exploration of instruction schedulers for out-of-order soft processors. FPT 2010: 385-388 - [c6]Kaveh Aasaraai, Andreas Moshovos:
An Efficient Non-blocking Data Cache for Soft Processors. ReConFig 2010: 19-24 - [c5]Monia Ghobadi, Martin Labrecque, Geoffrey Salmon, Kaveh Aasaraai, Soheil Hassas Yeganeh, Yashar Ganjali, J. Gregory Steffan:
Caliper: a tool to generate precise and closed-loop traffic. SIGCOMM 2010: 445-446
2000 – 2009
- 2009
- [c4]Kaveh Aasaraai, Andreas Moshovos:
Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming. FPL 2009: 79-85 - 2007
- [j2]Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai:
Exploiting Speculation Cost Prediction in Power-Aware Applications. J. Low Power Electron. 3(1): 43-53 (2007) - [c3]Kaveh Aasaraai, Amirali Baniasadi:
A Power-Aware Alternative for the Perceptron Branch Predictor. Asia-Pacific Computer Systems Architecture Conference 2007: 198-208 - [c2]Kaveh Aasaraai, Amirali Baniasadi, Ehsan Atoofian:
Computational and storage power optimizations for the O-GEHL branch predictor. Conf. Computing Frontiers 2007: 105-112 - [c1]Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai:
Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols. Conf. Computing Frontiers 2007: 259-266 - 2006
- [j1]Kaveh Aasaraai, Amirali Baniasadi:
Low-Power Perceptron Branch Predictor. J. Low Power Electron. 2(3): 333-341 (2006)
Coauthor Index
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