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ORCIDErno Salminen
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2020 – today
- 2024
[c47]Antti Rautakoura, Erno Salminen, Timo Hämäläinen:
Measuring the SoC development process quality with Fault-slip-Through methodology. MECO 2024: 1-8
2010 – 2019
- 2015
- [c46]Esko Pekkarinen, Mikko Teuho
, Erno Salminen, Timo D. Hämäläinen:
Resolving parameter reference management in IP-XACT using Kactus2. IECON 2015: 2765-2770 - 2014
- [c45]Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen:
Experiences from System-on-Chip design courses. EWME 2014: 37-42 - [c44]Timo D. Hämäläinen, Erno Salminen:
Gamification of System-on-Chip design. ISSoC 2014: 1-8 - [c43]Mikko Honkonen, Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen:
WOKE: A novel workflow model editor. ISSoC 2014: 1-8 - [c42]Janne Virtanen, Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen:
Implementation of Multicore communications API. ISSoC 2014: 1-6 - 2013
- [j13]Heikki Orsila, Erno Salminen, Timo Hämäläinen:
Recommendations for using Simulated Annealing in task mapping. Des. Autom. Embed. Syst. 17(1): 53-85 (2013) - [j12]Antti Alhonen, Erno Salminen, Lasse Lehtonen, Timo D. Hämäläinen:
A scalable, non-interfering, synthesizable Network-on-Chip monitor - Extended version. Microprocess. Microsystems 37(4-5): 446-459 (2013) - [c41]Erno Salminen, Timo D. Hämäläinen:
Teaching system-on-chip design with FPGAs. FPGAworld 2013: 1:1-1:7 - [c40]Antti Kamppi, Lauri Matilainen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen:
Extending IP-XACT to embedded system HW/SW integration. ISSoC 2013: 1-8 - [c39]Arttu Leppakoski, Erno Salminen, Timo D. Hämäläinen:
Framework for industrial embedded system product development and management. ISSoC 2013: 1-6 - [c38]Joni-Matti Määttä, Mikko Honkonen, Tommi Korhonen, Erno Salminen, Timo D. Hämäläinen:
Dependency analysis and visualization tool for Kactus2 IP-XACT design framework. ISSoC 2013: 1-6 - 2012
- [j11]Tero Arpinen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
MARTE profile extension for modeling dynamic power management of embedded systems. J. Syst. Archit. 58(5): 209-219 (2012) - [c37]Lauri Matilainen, Sakari Lahti, Otto Esko, Erno Salminen, Timo D. Hämäläinen:
Integration of TTA processor tools to Kactus2 IP-XACT design flow. NORCHIP 2012: 1-6 - [c36]Lauri Matilainen, Lasse Lehtonen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen:
System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata. ICSAMOS 2012: 209-216 - 2011
- [c35]Antti Kamppi, Lauri Matilainen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI. DSD 2011: 262-265 - [c34]Pekka Jääskeläinen, Erno Salminen, Otto Esko, Jarmo Takala:
Customizable Datapath Integrated Lock Unit. SoC 2011: 29-33 - [c33]Esko Pekkarinen, Lasse Lehtonen, Erno Salminen, Timo D. Hämäläinen:
A set of traffic models for Network-on-Chip benchmarking. SoC 2011: 78-81 - [c32]Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Applying IP-XACT in product data management. SoC 2011: 86-91 - [c31]Pekka Jääskeläinen, Erno Salminen, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez:
TCEMC: A co-design flow for application-specific multicores. ICSAMOS 2011: 85-92 - [c30]Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor. ICSAMOS 2011: 286-293 - 2010
- [b1]Erno Salminen:
On design and comparison of on-chip networks. University of Tampere, Finland, 2010
2000 – 2009
- 2009
- [j10]Tero Arpinen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation. EURASIP J. Embed. Syst. 2009 (2009) - [j9]Erno Salminen, Cristian Grecu, Timo D. Hämäläinen, André Ivanov:
Application modelling and hardware description for network-on-chip benchmarking. IET Comput. Digit. Tech. 3(5): 539-550 (2009) - [j8]Ari Kulmala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Evaluating SoC Network Performance in MPEG-4 Encoder. J. Signal Process. Syst. 56(2-3): 105-123 (2009) - [c29]Tero Arpinen, Tapio Koskinen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA. DATE 2009: 244-249 - [c28]Heikki Orsila, Erno Salminen, Timo D. Hämäläinen:
Parameterizing simulated annealing for distributing Kahn Process Networks on multiprocessor SoCs. SoC 2009: 19-26 - 2008
- [j7]Ari Kulmala, Erno Salminen, Timo D. Hämäläinen:
Distributed bus arbitration algorithm comparison on FPGA-based MPEG-4 multiprocessor system on chip. IET Comput. Digit. Tech. 2(4): 314-325 (2008) - [j6]Kalle Holma, Mikko Setälä, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Evaluating the model accuracy in automated design space exploration. Microprocess. Microsystems 32(5-6): 321-329 (2008) - [c27]Kalle Holma, Tero Arpinen, Erno Salminen, Marko Hännikäinen, Timo Hämäläinen:
Real-time execution monitoring on multi-processor system-on-chip. SoC 2008: 1-6 - [c26]Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo Hämäläinen:
Evaluation of heterogeneous multiprocessor architectures by energy and performance optimization. SoC 2008: 1-6 - [c25]Erno Salminen, Ari Kulmala, Timo Hämäläinen:
On the credibility of load-latency measurement of network-on-chips. SoC 2008: 1-7 - 2007
- [j5]Petri Kukkala, Mikko Setälä, Tero Arpinen, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Implementing a WLAN Video Terminal Using UML and Fully Automated Design Flow. EURASIP J. Embed. Syst. 2007 (2007) - [j4]Erno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen:
Benchmarking mesh and hierarchical bus networks in system-on-chip context. J. Syst. Archit. 53(8): 477-488 (2007) - [j3]Heikki Orsila, Tero Kangas, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Automated memory-aware application distribution for Multi-processor System-on-Chips. J. Syst. Archit. 53(11): 795-815 (2007) - [c24]Ari Kulmala, Erno Salminen, Timo D. Hämäläinen:
Instruction Memory Architecture Evaluation on Multiprocessor FPGA MPEG-4 Encoder. DDECS 2007: 105-110 - [c23]Antti Rasmus, Ari Kulmala, Erno Salminen, Timo D. Hämäläinen:
IP Integration Overhead Analysis in System-on-Chip Video Encoder. DDECS 2007: 333-336 - [c22]Kalle Holma, Mikko Setälä, Erno Salminen, Timo D. Hämäläinen:
Evaluating the Model Accuracy in Automated Design Space Exploration. DSD 2007: 173-180 - [c21]Erno Salminen, Ari Kulmala, Timo D. Hämäläinen:
On network-on-chip comparison. DSD 2007: 503-510 - [c20]Tero Arpinen, Mikko Setälä, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Modeling Embedded Software Platforms with a UML Profile. FDL 2007: 237-242 - [c19]Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo Hämäläinen:
Optimal Subset Mapping And Convergence Evaluation of Mapping Algorithms for Distributing Task Graphs on Multiprocessor SoC. SoC 2007: 1-6 - [c18]Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu:
Towards Open Network-on-Chip Benchmarks. NOCS 2007: 205 - [c17]Ari Kulmala, Erno Salminen, Timo D. Hämäläinen:
Evaluating Large System-on-Chip on Multi-FPGA Platform. SAMOS 2007: 179-189 - 2006
- [j2]Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen, Jouni Riihimäki, Kimmo Kuusilinna:
UML-based multiprocessor SoC design framework. ACM Trans. Embed. Comput. Syst. 5(2): 281-320 (2006) - [j1]Erno Salminen, Tero Kangas, Timo D. Hämäläinen, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna:
HIBI Communication Network for System-on-Chip. J. VLSI Signal Process. 43(2-3): 185-205 (2006) - [c16]Tero Arpinen, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications. DATE 2006: 1324-1329 - [c15]Ari Kulmala, Erno Salminen, Olli Lehtoranta, Timo D. Hämäläinen, Marko Hännikäinen:
Impact of Shared Instruction Memory on Performance of FPGA-based MP-SoC Video Encoder. DDECS 2006: 59-64 - [c14]Heikki Orsila, Tero Kangas, Erno Salminen, Timo Hämäläinen:
Parameterizing Simulated Annealing for Distributing Task Graphs on Multiprocessor SoCs. SoC 2006: 1-4 - [c13]Erno Salminen, Tero Kangas, Timo Hämäläinen:
The Impact of Communication on the Scalability of the Data-parallel Video Encoder on MPSoC. SoC 2006: 1-4 - [c12]Ari Kulmala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Evaluating SoC Network Performance in MPEG-4 Encoder. SiPS 2006: 250-255 - 2005
- [c11]Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko Hännikäinen, Timo D. Hämäläinen:
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC. FPL 2005: 380-385 - [c10]Erno Salminen, Ari Kulmala, Timo D. Hämäläinen:
HIBI-based multiprocessor SoC on FPGA. ISCAS (4) 2005: 3351-3354 - [c9]Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen:
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context. SAMOS 2005: 354-363 - 2004
- [c8]Jouni Riihimäki, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Kimmo Kuusilinna, Timo D. Hämäläinen:
Practical distributed simulation of a network of wireless terminals. SoC 2004: 49-52 - [c7]Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen:
Comparison of hardware IP components for system-on-chip. SoC 2004: 69-73 - [c6]Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen:
HIBI v.2 Communication Network for System-on-Chip. SAMOS 2004: 413-422 - [c5]Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen:
A Communication-Centric Design Flow for HIBI-Based SoCs. SAMOS 2004: 474-483 - 2003
- [c4]Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen:
Comparison of synthesized bus and crossbar interconnection architectures. ISCAS (5) 2003: 433-436 - [c3]Tero Kangas, Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen:
Using a communication generator in SoC architecture exploration. SoC 2003: 105-108 - 2002
- [c2]Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo Hämäläinen:
Parameter optimization tool for enhancing on-chip network performance. ISCAS (4) 2002: 61-64 - 2001
- [c1]Erno Salminen, Timo D. Hämäläinen, Tero Kangas, Kimmo Kuusilinna, Jukka Saarinen:
Interfacing multiple processors in a system-on-chip video encoder. ISCAS (4) 2001: 478-481
Coauthor Index
aka: Timo D. Hämäläinen
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