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ORCIDMesut Meterelliyoz
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2010 – 2019
- 2019
[c14]Pulkit Jain, Umut Arslan, Meenakshi Sekhar, Blake C. Lin, Liqiong Wei, Tanaya Sahu, Juan Alzate-vinasco, Ajay Vangapaty, Mesut Meterelliyoz, Nathan Strutt, Albert B. Chen, Patrick Hentges, Pedro A. Quintero, Chris Connor, Oleg Golonzka, Kevin Fischer, Fatih Hamzaoglu:
A 3.6Mb 10.1Mb/mm2 Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7V. ISSCC 2019: 212-214- [c13]Liqiong Wei, Juan G. Alzate, Umut Arslan, Justin Brockman, Nilanjan Das, Kevin Fischer, Tahir Ghani, Oleg Golonzka, Patrick Hentges, Rawshan Jahan, Pulkit Jain, Blake C. Lin, Mesut Meterelliyoz, Jim O'Donnell, Conor Puls, Pedro A. Quintero, Tanaya Sahu, Meenakshi Sekhar, Ajay Vangapaty, Chris Wiegand, Fatih Hamzaoglu:
A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique. ISSCC 2019: 214-216 - 2015
- [j6]Fatih Hamzaoglu, Umut Arslan, Nabhendra Bisnik, Swaroop Ghosh, Manoj B. Lal, Nick Lindert, Mesut Meterelliyoz, Randy B. Osborne, Joodong Park, Shigeki Tomishima
, Yih Wang, Kevin Zhang:
A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology. IEEE J. Solid State Circuits 50(1): 150-157 (2015) - 2014
- [c12]Fatih Hamzaoglu, Umut Arslan, Nabhendra Bisnik, Swaroop Ghosh, Manoj B. Lal, Nick Lindert, Mesut Meterelliyoz, Randy B. Osborne, Joodong Park, Shigeki Tomishima, Yih Wang, Kevin Zhang:
13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology. ISSCC 2014: 230-231 - [c11]Mesut Meterelliyoz, Fuad H. Al-amoody, Umut Arslan, Fatih Hamzaoglu, Luke Hood, Manoj B. Lal, Jeffrey L. Miller, Anand Ramasundar, Dan Soltman, Ifar Wan, Yih Wang, Kevin Zhang:
2nd generation embedded DRAM with 4X lower self refresh power in 22nm Tri-Gate CMOS technology. VLSIC 2014: 1-2 - 2013
- [j5]Eric Karl, Yih Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu, Mesut Meterelliyoz, John Keane, Uddalak Bhattacharya, Kevin Zhang, Kaizad Mistry, Mark Bohr:
A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry. IEEE J. Solid State Circuits 48(1): 150-158 (2013) - 2011
- [c10]Ashish Goel, Swaroop Ghosh, Mesut Meterelliyoz, Jeff Parkhurst, Kaushik Roy:
Integrated Design & Test: Conquering the Conflicting Requirements of Low-Power, Variation-Tolerance and Test Cost. Asian Test Symposium 2011: 486-491 - 2010
- [j4]Mesut Meterelliyoz, Jaydeep P. Kulkarni, Kaushik Roy:
Analysis of SRAM and eDRAM Cache Memories Under Spatial Temperature Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(1): 2-13 (2010) - [j3]Mesut Meterelliyoz, Peilin Song, Franco Stellari, Jaydeep P. Kulkarni, Kaushik Roy:
Characterization of Random Process Variations Using Ultralow-Power, High-Sensitivity, Bias-Free Sub-Threshold Process Sensor. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 1838-1847 (2010) - [c9]Mesut Meterelliyoz, Ashish Goel, Jaydeep P. Kulkarni, Kaushik Roy:
Accurate characterization of random process variations using a robust low-voltage high-sensitivity sensor featuring replica-bias circuit. ISSCC 2010: 186-187
2000 – 2009
- 2009
- [c8]Mesut Meterelliyoz, Kaushik Roy:
Design for burn-in test: a technique for burn-in thermal stability under die-to-die parameter variations. ASP-DAC 2009: 787-792 - [c7]Rouwaida Kanj, Rajiv V. Joshi, Jente B. Kuang, J. Kim, Mesut Meterelliyoz, William R. Reohr, Sani R. Nassif, Kevin J. Nowka:
Statistical yield analysis of silicon-on-insulator embedded DRAM. ISQED 2009: 190-194 - 2008
- [j2]Philip G. Emma, William R. Reohr, Mesut Meterelliyoz:
Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications. IEEE Micro 28(6): 47-56 (2008) - [c6]Mesut Meterelliyoz, Peilin Song, Franco Stellari, Jaydeep P. Kulkarni, Kaushik Roy:
A high sensitivity process variation sensor utilizing sub-threshold operation. CICC 2008: 125-128 - [c5]Mesut Meterelliyoz, Jaydeep P. Kulkarni, Kaushik Roy:
Thermal analysis of 8-T SRAM for nano-scaled technologies. ISLPED 2008: 123-128 - 2007
- [j1]Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy:
Self-Consistent Approach to Leakage Power and Temperature Estimation to Predict Thermal Runaway in FinFET Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11): 2059-2068 (2007) - 2006
- [c4]Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh, Jung Hwan Choi, Jayathi Murthy, Kaushik Roy:
Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology. ASP-DAC 2006: 237-242 - [c3]Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy:
Leakage power dependent temperature estimation to predict thermal runaway in FinFET circuits. ICCAD 2006: 583-586 - [c2]Qikai Chen, Mesut Meterelliyoz, Kaushik Roy:
A CMOS Thermal Sensor and Its Applications in Temperature Adaptive Design. ISQED 2006: 243-248 - 2005
- [c1]Mesut Meterelliyoz, Hamid Mahmoodi, Kaushik Roy:
A leakage control system for thermal stability during burn-in test. ITC 2005: 10
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