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ORCIDPaul E. Hasler
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- affiliation: Georgia Institute of Technology, Atlanta GA, USA
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2010 – 2019
- 2013
[j52]Stephen Brink, Stephen Nease, Paul E. Hasler:
Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit. Neural Networks 45: 39-49 (2013)- [j51]Samuel A. Shapero, Christopher J. Rozell
, Paul E. Hasler:
Configurable hardware integrate and fire neurons for sparse approximation. Neural Networks 45: 134-143 (2013) - [j50]Stephen Brink, Stephen Nease, Paul E. Hasler, Shubha Ramakrishnan, Richard B. Wunderlich, Arindam Basu, Brian P. Degnan:
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena. IEEE Trans. Biomed. Circuits Syst. 7(1): 71-81 (2013) - [j49]Samuel A. Shapero, Paul E. Hasler:
Mismatch Characterization and Calibration for Accurate and Automated Analog Design. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(3): 548-556 (2013) - [j48]Bo Marr, Brian P. Degnan, Paul E. Hasler, David V. Anderson:
Scaling Energy Per Operation via an Asynchronous Pipeline. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 147-151 (2013) - [j47]Richard B. Wunderlich, Farhan Adil, Paul E. Hasler:
Floating Gate-Based Field Programmable Mixed-Signal Array. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1496-1505 (2013) - [c141]Stephen Nease, Stephen Brink, Paul E. Hasler:
STDP-enabled learning on a reconfigurable neuromorphic platform. ECCTD 2013: 1-4 - 2012
- [j46]Samuel A. Shapero, Adam S. Charles, Christopher J. Rozell, Paul E. Hasler:
Low Power Sparse Approximation on Reconfigurable Analog Hardware. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(3): 530-541 (2012) - [j45]Craig Schlottmann, Samuel A. Shapero, Stephen Nease, Paul E. Hasler:
A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing. IEEE J. Solid State Circuits 47(9): 2174-2184 (2012) - [j44]Stephen Nease, Suma George, Paul E. Hasler, Scott Koziol, Stephen Brink:
Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform. IEEE Trans. Biomed. Circuits Syst. 6(1): 76-84 (2012) - [j43]Gokce Gurun, Jaime S. Zahorian, Alper Sisman, Mustafa Karaman, Paul E. Hasler, Levent Degertekin:
An Analog Integrated Circuit Beamformer for High-Frequency Medical Ultrasound Imaging. IEEE Trans. Biomed. Circuits Syst. 6(5): 454-467 (2012) - [j42]Craig Schlottmann, David Abramson, Paul E. Hasler:
A MITE-Based Translinear FPAA. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 1-9 (2012) - [j41]Craig Schlottmann, Csaba Petre, Paul E. Hasler:
A High-Level Simulink-Based Tool for FPAA Configuration. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 10-18 (2012) - [c140]Samuel A. Shapero, Paul E. Hasler:
Neuromorphic hardware for rapid sparse coding. BioCAS 2012: 396-399 - [c139]Shubha Ramakrishnan, Richard B. Wunderlich, Paul E. Hasler:
Neuron array with plastic synapses and programmable dendrites. BioCAS 2012: 400-403 - [c138]Craig Schlottmann, Stephen Nease, Samuel A. Shapero, Paul E. Hasler:
A mixed-mode FPAA SoC for analog-enhanced signal processing. CICC 2012: 1-4 - [c137]Jeff Dugger, Paul D. Smith, Matt Kucic, Paul E. Hasler:
An analog adaptive beamforming circuit for audio noise reduction. ICASSP 2012: 5293-5296 - [c136]Craig Schlottmann, Paul E. Hasler:
FPAA empowering cooperative analog-digital signal processing. ICASSP 2012: 5301-5304 - [c135]Scott Koziol, Paul E. Hasler, Mike Stilman:
Robot path planning using Field Programmable Analog Arrays. ICRA 2012: 1747-1752 - 2011
- [j40]Craig Schlottmann, Paul E. Hasler:
A Highly Dense, Low Power, Programmable Analog Vector-Matrix Multiplier: The FPAA Implementation. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(3): 403-411 (2011) - [j39]Shubha Ramakrishnan, Paul E. Hasler, Christal Gordon:
Floating Gate Synapses With Spike-Time-Dependent Plasticity. IEEE Trans. Biomed. Circuits Syst. 5(3): 244-252 (2011) - [j38]Sangwook Suh, Arindam Basu, Craig Schlottmann, Paul E. Hasler, John R. Barry:
Low-Power Discrete Fourier Transform for OFDM: A Programmable Analog Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(2): 290-298 (2011) - [j37]Arindam Basu, Paul E. Hasler:
A Fully Integrated Architecture for Fast and Accurate Programming of Floating Gates Over Six Decades of Current. IEEE Trans. Very Large Scale Integr. Syst. 19(6): 953-962 (2011) - [c134]Scott Koziol, Paul E. Hasler:
Reconfigurable Analog VLSI circuits for robot path planning. AHS 2011: 36-43 - [c133]Paul E. Hasler, Craig Scholttmann, Scott Koziol:
FPAA chips and tools as the center of an design-based analog systems education. MSE 2011: 47-51 - [c132]Scott Koziol, David Lenz, Sebastian Hilsenbeck, Smriti Chopra, Paul E. Hasler, Ayanna M. Howard:
Using floating-gate based programmable analog arrays for real-time control of a game-playing robot. SMC 2011: 3566-3571 - 2010
- [j36]Arindam Basu, Stephen Brink, Craig Schlottmann, Shubha Ramakrishnan, Csaba Petre, Scott Koziol, I. Faik Baskaya, Christopher M. Twigg, Paul E. Hasler:
A Floating-Gate-Based Field-Programmable Analog Array. IEEE J. Solid State Circuits 45(9): 1781-1794 (2010) - [j35]Ryan W. Robucci, Jordan D. Gray, Leung Kin Chiu, Justin K. Romberg, Paul E. Hasler:
Compressive Sensing on a CMOS Separable-Transform Image Sensor. Proc. IEEE 98(6): 1089-1101 (2010) - [j34]Arindam Basu, Shubha Ramakrishnan, Csaba Petre, Scott Koziol, Stephen Brink, Paul E. Hasler:
Neural Dynamics in Reconfigurable Silicon. IEEE Trans. Biomed. Circuits Syst. 4(5): 311-319 (2010) - [j33]Arindam Basu, Csaba Petre, Paul E. Hasler:
Dynamics and Bifurcations in a Silicon Neuron. IEEE Trans. Biomed. Circuits Syst. 4(5): 320-328 (2010) - [j32]Arindam Basu, Paul E. Hasler:
Nullcline-Based Design of a Silicon Neuron. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11): 2938-2947 (2010) - [j31]Bo Marr, Jason George, Brian P. Degnan, David V. Anderson, Paul E. Hasler:
Error Immune Logic for Low-Power Probabilistic Computing. VLSI Design 2010: 460312:1-460312:9 (2010) - [j30]Kofi M. Odame, Paul E. Hasler:
Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping. VLSI Design 2010: 687498:1-687498:8 (2010) - [c131]Craig Schlottmann, Csaba Petre, Paul E. Hasler:
Vector matrix multiplier on field programmable analog array. ICASSP 2010: 1522-1525 - [c130]Shubha Ramakrishnan, Paul E. Hasler, Christal Gordon:
Floating gate synapses with spike time dependent plasticity. ISCAS 2010: 369-372 - [c129]Brian P. Degnan, Brian J. Duffy, Paul E. Hasler:
Crossbar switch matrix for floating-gate programming over large current ranges. ISCAS 2010: 861-864 - [c128]Craig Schlottmann, Brian P. Degnan, David Abramson, Paul E. Hasler:
Reducing offset errors in MITE systems by precise floating gate programming. ISCAS 2010: 1340-1343 - [c127]Arindam Basu, Shubha Ramakrishnan, Paul E. Hasler:
Neural dynamics in reconfigurable silicon. ISCAS 2010: 1943-1946 - [c126]Muhammad Shakeel Qureshi, Arindam Basu, Baris Bicen, Levent Degertekin, Paul E. Hasler:
Integrated low voltage and low power CMOS circuits for optical sensing of diffraction based micromachined microphone. ISCAS 2010: 2031-2034 - [c125]Scott Koziol, Craig Schlottmann, Arindam Basu, Stephen Brink, Csaba Petre, Brian P. Degnan, Shubha Ramakrishnan, Paul E. Hasler, Aurele Balavoine:
Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs. ISCAS 2010: 2793 - [c124]Scott Koziol, Craig Schlottmann, Arindam Basu, Stephen Brink, Csaba Petre, Brian P. Degnan, Shubha Ramakrishnan, Paul E. Hasler, Aurele Balavoine:
Hardware and software infrastructure for a family of floating-gate based FPAAs. ISCAS 2010: 2794-2797
2000 – 2009
- 2009
- [j29]Gail Rosen, Paul E. Hasler, Mark T. Smith:
Implementation of a Hebbian chemoreceptor model for diffusive source localization. Biosyst. 96(3): 223-236 (2009) - [j28]Christopher M. Twigg, Paul E. Hasler:
Configurable analog signal processing. Digit. Signal Process. 19(6): 904-922 (2009) - [j27]Kofi M. Odame, Paul E. Hasler:
Theory and Design of OTA-C Oscillators with Native Amplitude Limiting. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(1): 40-50 (2009) - [c123]Bo Marr, Arindam Basu, Stephen Brink, Paul E. Hasler:
A learning digital computer. DAC 2009: 617-618 - [c122]Faik Baskaya, David V. Anderson, Paul E. Hasler, Sung Kyu Lim:
A generic reconfigurable array specification and programming environment (GRASPER). ECCTD 2009: 619-622 - [c121]Mikko Pänkäälä, Mika Laiho, Paul E. Hasler:
Compact floating-gate learning array with STDP. IJCNN 2009: 2409-2415 - [c120]Sheng-Yu Peng, Gokce Gurun, Christopher M. Twigg, Muhammad Shakeel Qureshi, Arindam Basu, Stephen Brink, Paul E. Hasler, Levent Degertekin:
A Large-scale Reconfigurable Smart Sensory Chip. ISCAS 2009: 2145-2148 - [c119]Brian P. Degnan, Richard B. Wunderlich, Paul E. Hasler:
Passgate Resistance Estimation based on the Compact EKV Model and Effective Mobility. ISCAS 2009: 2765-2768 - [c118]Bo Marr, Brian P. Degnan, Paul E. Hasler, David V. Anderson:
An Asynchronously Embedded Datapath for Performance Acceleration and Energy Efficiency. ISCAS 2009: 3046-3049 - 2008
- [j26]Guillermo J. Serrano, Paul E. Hasler:
A Precision Low-TC Wide-Range CMOS Current Reference. IEEE J. Solid State Circuits 43(2): 558-565 (2008) - [j25]Erhan Özalevli, Walter Huang, Paul E. Hasler, David V. Anderson:
A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(2): 510-521 (2008) - [j24]Kofi M. Odame, David V. Anderson, Paul E. Hasler:
A Bandpass Filter With Inherent Gain Adaptation for Hearing Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(3): 786-795 (2008) - [j23]Erhan Özalevli, Haw-Jing Lo, Paul E. Hasler:
Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(4): 990-998 (2008) - [j22]Erhan Özalevli, Paul E. Hasler:
Tunable Highly Linear Floating-Gate CMOS Resistor Using Common-Mode Linearization Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(4): 999-1010 (2008) - [j21]Sheng-Yu Peng, Muhammad Shakeel Qureshi, Paul E. Hasler, Arindam Basu, Levent Degertekin:
A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(7): 1863-1872 (2008) - [j20]Srinivasan Venkatesh, Guillermo J. Serrano, Christopher M. Twigg, Paul E. Hasler:
A Floating-Gate-Based Programmable CMOS Reference. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3448-3456 (2008) - [j19]Christopher M. Twigg, Paul E. Hasler:
Incorporating Large-Scale FPAAs Into Analog Design and Test Courses. IEEE Trans. Educ. 51(3): 319-324 (2008) - [c117]Arindam Basu, Christopher M. Twigg, Stephen Brink, Paul E. Hasler, Csaba Petre, Shubha Ramakrishnan, Scott Koziol, Craig Schlottmann:
RASP 2.8: A new generation of floating-gate based field programmable analog array. CICC 2008: 213-216 - [c116]Sheng-Yu Peng, Yu Tsao, Paul E. Hasler, David V. Anderson:
A programmable analog radial-basis-function based classifier. ICASSP 2008: 1425-1428 - [c115]Ryan W. Robucci, Leung Kin Chiu, Jordan D. Gray, Justin K. Romberg, Paul E. Hasler, David V. Anderson:
Compressive sensing on a CMOS separable transform image sensor. ICASSP 2008: 5125-5128 - [c114]Arindam Basu, Csaba Petre, Paul E. Hasler:
Bifurcations in a silicon neuron. ISCAS 2008: 428-431 - [c113]Stephen Brink, Scott Koziol, Shubha Ramakrishnan, Paul E. Hasler:
A biophysically based dendrite model using programmable floating-gate devices. ISCAS 2008: 432-435 - [c112]Csaba Petre, Craig Schlottmann, Paul E. Hasler:
Automated conversion of Simulink designs to analog hardware on an FPAA. ISCAS 2008: 500-503 - [c111]Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler:
Analog VLSI implementation of support vector machine learning and classification. ISCAS 2008: 860-863 - [c110]Jordan D. Gray, Srinivasan Venkatesh, Ryan W. Robucci, Paul E. Hasler:
A floating-gate transistor based continuous-time analog adaptive filter. ISCAS 2008: 908-911 - [c109]Ryan W. Robucci, Jordan D. Gray, David Abramson, Paul E. Hasler:
A 256×256 separable transform CMOS imager. ISCAS 2008: 1420-1423 - 2007
- [j18]Srinivasan Venkatesh, Guillermo J. Serrano, Jordan D. Gray, Paul E. Hasler:
A Precision CMOS Amplifier Using Floating-Gate Transistors for Offset Cancellation. IEEE J. Solid State Circuits 42(2): 280-291 (2007) - [j17]Ravi Chawla, Farhan Adil, Guillermo J. Serrano, Paul E. Hasler:
Programmable Gm- C Filters Using Floating-Gate Operational Transconductance Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(3): 481-491 (2007) - [j16]David W. Graham, Ethan Farquhar, Brian P. Degnan, Christal Gordon, Paul E. Hasler:
Indirect Programming of Floating-Gate Transistors. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(5): 951-963 (2007) - [j15]David W. Graham, Paul E. Hasler, Ravi Chawla, Paul D. Smith:
A Low-Power Programmable Bandpass Filter Section for Higher Order Filter Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(6): 1165-1176 (2007) - [j14]Sheng-Yu Peng, Paul E. Hasler, David V. Anderson:
An Analog Programmable Multidimensional Radial Basis Function Based Classifier. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(10): 2148-2158 (2007) - [j13]Arindam Basu, Ryan W. Robucci, Paul E. Hasler:
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating Over Seven Decades of Current. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(10): 2167-2177 (2007) - [c108]I. Faik Baskaya, Brian Gestner, Christopher M. Twigg, Sung Kyu Lim, David V. Anderson, Paul E. Hasler:
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array. FCCM 2007: 319-320 - [c107]Christopher M. Twigg, Paul E. Hasler, David V. Anderson:
Large-Scale FPAA Devices for Signal Processing Applications. ICASSP (2) 2007: 69-72 - [c106]Christopher M. Twigg, Jordan D. Gray, Paul E. Hasler:
Programmable Floating Gate FPAA Switches Are Not Dead Weight. ISCAS 2007: 169-172 - [c105]Christopher M. Twigg, Paul E. Hasler:
Programmable Conductance Switches for FPAAs. ISCAS 2007: 173-176 - [c104]Paul E. Hasler, Christopher M. Twigg:
An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. ISCAS 2007: 177-180 - [c103]Kofi M. Odame, Christopher M. Twigg, Arindam Basu, Paul E. Hasler:
Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform. ISCAS 2007: 445-448 - [c102]Kofi M. Odame, Paul E. Hasler:
An Efficient Oscillator Design Based on OTA Nonlinearity. ISCAS 2007: 921-924 - [c101]Arindam Basu, Paul E. Hasler:
A Fully Integrated Architecture for Fast Programming of Floating Gates. ISCAS 2007: 957-960 - [c100]Christopher M. Twigg, Paul E. Hasler, I. Faik Baskaya:
A Self-Contained Large-Scale FPAA Development Platform. ISCAS 2007: 1187-1191 - [c99]Paul E. Hasler, Arindam Basu, Sctt Kozil:
Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems. ISCAS 2007: 1557-1560 - [c98]Arindam Basu, Kofi M. Odame, Paul E. Hasler:
Dynamics of a Logarithmic Transimpedance Amplifier. ISCAS 2007: 1673-1676 - [c97]Erhan Ozalevli, Walter Huang, Paul E. Hasler, David V. Anderson:
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter. ISCAS 2007: 2168-2171 - [c96]Shyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch:
Optimal Synthesis of MITE Translinear Loops. ISCAS 2007: 2822-2825 - [c95]Arindam Basu, Ryan W. Robucci, Paul E. Hasler:
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating over Seven Decades of Current. ISCAS 2007: 3055-3058 - [c94]Kofi M. Odame, Paul E. Hasler:
An Adaptive Quality-Factor Bandpass Filter. ISCAS 2007: 3295-3298 - [c93]Paul E. Hasler, Scott Koziol, Ethan Farquhar, Arindam Basu:
Transistor Channel Dendrites implementing HMM classifiers. ISCAS 2007: 3359-3362 - [c92]Richard B. Wunderlich, Brian P. Degnan, Paul E. Hasler:
Capacitively-Biased Floating-Gate CMOS: a New Logic Family. ISCAS 2007: 3728-3731 - [c91]David W. Graham, Paul E. Hasler:
Run-Time Programming of Analog Circuits Using Floating-Gate Transistors. ISCAS 2007: 3816-3819 - [c90]Christopher M. Twigg, Paul E. Hasler:
Incorporating Large-Scale FPAAs in Analog Design Courses. MSE 2007: 171-172 - [c89]Sheng-Yu Peng, Paul E. Hasler, David V. Anderson:
A Programmable Multi-Dimensional Analog Radial-Basis- Function-Based Classifier. VLSI-SoC (Selected Papers) 2007: 1-20 - [c88]Sheng-Yu Peng, Paul E. Hasler, David V. Anderson:
An analog programmable multi-dimensional radial basis function based classifier. VLSI-SoC 2007: 13-18 - 2006
- [j12]Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler:
MATIA: a programmable 80 WμW/frame CMOS block matrix transform imager architecture. IEEE J. Solid State Circuits 41(3): 663-672 (2006) - [j11]Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler:
Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades. IEEE J. Solid State Circuits 41(9): 2107-2114 (2006) - [j10]Erhan Özalevli, Paul E. Hasler, Charles M. Higgins:
Winner-Take-All-Based Visual Motion Sensors. IEEE Trans. Circuits Syst. II Express Briefs 53-II(8): 717-721 (2006) - [c87]Christopher M. Twigg, Paul E. Hasler:
A Large-Scale Reconfigurable Analog Signal Processor (RASP) IC. CICC 2006: 5-8 - [c86]Erhan Ozalevli, Hüseyin Dinc, Haw-Jing Lo, Paul E. Hasler:
Design of a binary-weighted resistor DAC using tunable linearized floating-gate CMOS resistors. CICC 2006: 149-152 - [c85]Sheng-Yu Peng, Muhammad Shakeel Qureshi, Arindam Basu, Paul E. Hasler, Levent Degertekin:
A Floating-gate Based Low-Power Capacitive Sensing Interface Circuit. CICC 2006: 257-260 - [c84]Srinivasan Venkatesh, Guillermo J. Serrano, Christopher M. Twigg, Paul E. Hasler:
A Compact Programmable CMOS Reference With ±40μV Accuracy. CICC 2006: 611-614 - [c83]Paul E. Hasler, Ethan Farquhar, Christal Gordon:
Building large networks of biological neurons. EMBC (Supplement) 2006: 6548-6551 - [c82]Gail L. Rosen, Paul E. Hasler:
Chemical Source Localization in Unknown Turbulence Using the Cross-Correlation Method. ICASSP (3) 2006: 1116-1119 - [c81]H. Dine, S. Chuang, Phillip E. Allen, Paul E. Hasler:
A rail to rail, slew-boosted pre-charge buffer. ISCAS 2006 - [c80]Ethan Farquhar, Christal Gordon, Paul E. Hasler:
A field programmable neural array. ISCAS 2006 - [c79]Christal Gordon, Amanda Preyer, Karolyn Babalola, Robert J. Butera, Paul E. Hasler:
An artificial synapse for interfacing to biological neurons. ISCAS 2006 - [c78]Erhan Ozalevli, Paul E. Hasler:
A tunable floating gate CMOS resistor for low-power and low-voltage applications. ISCAS 2006 - [c77]Erhan Ozalevli, Muhammad Shakeel Qureshi, Paul E. Hasler:
Low-voltage floating-gate CMOS buffer. ISCAS 2006 - [c76]Sheng-Yu Peng, Muhammad Shakeel Qureshi, Paul E. Hasler, Neal A. Hall, F. L. Degertekin:
High SNR capacitive sensing transducer. ISCAS 2006 - [c75]Francesco Tenore, R. Jacob Vogelstein, Ralph Etienne-Cummings, Gert Cauwenberghs, Paul E. Hasler:
A floating-gate programmable array of silicon neurons for central pattern generating networks. ISCAS 2006 - 2005
- [j9]Sourabh Ravindran, Paul D. Smith, David W. Graham, Varinthira Duangudom, David V. Anderson, Paul E. Hasler:
Towards Low-Power On-chip Auditory Processing. EURASIP J. Adv. Signal Process. 2005(7): 1082-1092 (2005) - [j8]Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson:
Developing large-scale field-programmable analog arrays for rapid prototyping. Int. J. Embed. Syst. 1(3/4): 179-192 (2005) - [j7]Ethan Farquhar, Paul E. Hasler:
A bio-physically inspired silicon neuron. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(3): 477-488 (2005) - [j6]Paul E. Hasler, Jeff Dugger:
An analog floating-gate node for Supervised learning. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(5): 834-845 (2005) - [j5]Tyson S. Hall, Christopher M. Twigg, Jordan D. Gray, Paul E. Hasler, David V. Anderson:
Large-scale field-programmable analog arrays for analog signal processing. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(11): 2298-2307 (2005) - [c74]Erhan Ozalevli, Paul E. Hasler:
Design of a CMOS floating-gate resistor for highly linear amplifier and multiplier applications. CICC 2005: 735-73 - [c73]Srinivasan Venkatesh, Guillermo J. Serrano, Jordan D. Gray, Paul E. Hasler:
A precision CMOS amplifier using floating-gates for offset cancellation. CICC 2005: 739-742 - [c72]Jungwon Lee, Abhishek Bandyopadhyay, I. Faik Baskaya, Ryan W. Robucci, Paul E. Hasler:
Image processing system using a programmable transform imager. ICASSP (5) 2005: 101-104 - [c71]Mark Hooper, Matt Kucic, Paul E. Hasler:
Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits. ISCAS (1) 2005: 125-128 - [c70]David N. Abramson, Jordan D. Gray, Christopher M. Twigg, Paul E. Hasler:
Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network. ISCAS (1) 2005: 468-471 - [c69]Shyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch:
Synthesis of MITE log-domain filters with unique operating points. ISCAS (2) 2005: 996-999 - [c68]David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler:
A low-power, programmable bandpass filter section for higher-order filter-bank applications. ISCAS (3) 2005: 1980-1983 - [c67]Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler:
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method. ISCAS (3) 2005: 2148-2151 - [c66]Erhan Ozalevli, Paul E. Hasler:
Programmable floating-gate CMOS resistors. ISCAS (3) 2005: 2168-2171 - [c65]David W. Graham, Ethan Farquhar, Brian P. Degnan, Christal Gordon, Paul E. Hasler:
Indirect programming of floating-gate transistors. ISCAS (3) 2005: 2172-2175 - [c64]Brian P. Degnan, Richard B. Wunderlich, Paul E. Hasler:
Programmable floating-gate techniques for CMOS inverters. ISCAS (3) 2005: 2441-2444 - [c63]Francesco Tenore, R. Jacob Vogelstein, Ralph Etienne-Cummings, Gert Cauwenberghs, M. Anthony Lewis, Paul E. Hasler:
A spiking silicon central pattern generator with floating gate synapses [robot control applications]. ISCAS (4) 2005: 4106-4109 - [c62]Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler:
A programmable floating-gate bump circuit with variable width. ISCAS (5) 2005: 4341-4344 - [c61]Srinivasan Venkatesh, Jeff Dugger, Paul E. Hasler:
An adaptive analog synapse circuit that implements the least-mean-square learning rule. ISCAS (5) 2005: 4441-4444 - [c60]Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler:
A 80µW/frame 104×128 CMOS imager front end for JPEG compression. ISCAS (5) 2005: 5318-5321 - [c59]Erhan Ozalevli, Christopher M. Twigg, Paul E. Hasler:
10-bit programmable voltage-output digital-analog converter. ISCAS (6) 2005: 5553-5556 - [c58]Ravi Chawla, Christopher M. Twigg, Paul E. Hasler:
An analog modulator/demodulator using a programmable arbitrary waveform generator. ISCAS (6) 2005: 6106-6109 - [c57]Philomena C. Brady, Paul E. Hasler:
Offset compensation in flash ADCs using floating-gate circuits. ISCAS (6) 2005: 6154-6157 - [c56]Paul E. Hasler:
Low-Power Programmable Signal Processing, invited. IWSOC 2005: 413-418 - [c55]David N. Abramson, Jordan D. Gray, Shyam Subramanian, Paul E. Hasler:
A Field-Programmable Analog Array Using Translinear Elements. IWSOC 2005: 425-428 - [c54]Paul E. Hasler, AiChen Low:
Programmable Low Dropout Voltage Regulator. IWSOC 2005: 459-462 - [c53]Paul E. Hasler:
Floating-Gate Devices, Circuits, and Systems, invited. IWSOC 2005: 482-487 - 2004
- [c52]Ravi Chawla, Abhishek Bandyopadhyay, Venkatesh Srinivasan, Paul E. Hasler:
A 531 nW/MHz, 128×32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity. CICC 2004: 651-654 - [c51]Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson:
Developing Large-Scale Field-Programmable Analog Arrays. IPDPS 2004 - [c50]Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul E. Hasler, Bradley A. Minch:
A fully programmable log-domain bandpass filter using multiple-input translinear elements. ISCAS (1) 2004: 33-36 - [c49]David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler:
A programmable bandpass array using floating-gate elements. ISCAS (1) 2004: 97-100 - [c48]Shyam Subramanian, David V. Anderson, Paul E. Hasler:
Synthesis of static multiple input multiple output MITE networks. ISCAS (1) 2004: 189-192 - [c47]Angelo W. Pereira, Daniel J. Allen, Paul E. Hasler:
A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements. ISCAS (1) 2004: 213-216 - [c46]Ethan Farquhar, Paul E. Hasler:
A bio-physically inspired silicon neuron. ISCAS (1) 2004: 309-312 - [c45]Ethan Farquhar, David N. Abramson, Paul E. Hasler:
A reconfigurable bidirectional active 2 dimensional dendrite model. ISCAS (1) 2004: 313-316 - [c44]Christal Gordon, Ethan Farquhar, Paul E. Hasler:
A family of floating-gate adapting synapses based upon transistor channel models. ISCAS (1) 2004: 317-20 - [c43]Guillermo J. Serrano, Paul E. Hasler:
A floating-gate DAC array. ISCAS (1) 2004: 357-360 - [c42]Guillermo J. Serrano, Paul D. Smith, Haw-Jing Lo, Ravi Chawla, Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler:
Automatic rapid programming of large arrays of floating-gate elements. ISCAS (1) 2004: 373-376 - [c41]Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson:
Application performance of elements in a floating-gate FPAA. ISCAS (2) 2004: 589-592 - [c40]Jeff Dugger, Paul E. Hasler:
Supervised learning in a two-input analog floating-gate node. ISCAS (5) 2004: 756-759 - [c39]Haw-Jing Lo, Guillermo J. Serrano, Paul E. Hasler, David V. Anderson, Bradley A. Minch:
Programmable multiple input translinear elements. ISCAS (1) 2004: 757-760 - [c38]Heejong Yoo, David W. Graham, David V. Anderson, Paul E. Hasler:
C4 band-pass delay filter for continuous-time subband adaptive tapped-delay filter. ISCAS (5) 2004: 792-795 - [c37]Ravi Chawla, Guillermo J. Serrano, Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler:
Fully differential floating-gate programmable OTAs with novel common-mode feedback. ISCAS (1) 2004: 817-820 - [c36]Mark Hooper, Matt Kucic, Paul E. Hasler:
5V-only, standard 0.5μm CMOS programmable and adaptive floating-gate circuits and arrays using CMOS charge pumps. ISCAS (5) 2004: 832-835 - [c35]Paul D. Smith, David W. Graham, Ravi Chawla, Paul E. Hasler:
A five-transistor bandpass filter element. ISCAS (1) 2004: 861-864 - [c34]Mark Hooper, Matt Kucic, Paul E. Hasler:
Characterization of charge-pump rectifiers for standard submicron CMOS processes. ISCAS (5) 2004: 964-967 - [c33]Erhan Ozalevli, Paul E. Hasler, Farhan Adil:
Programmable voltage-output, floating-gate digital-analog converter. ISCAS (1) 2004: 1064-1067 - [c32]Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler:
A programmable coefficient continuous-time A/D Delta-Sigma modulator. ISCAS (1) 2004: 1148-1151 - 2003
- [j4]Paul E. Hasler, Abhishek Bandyopadhyay, David V. Anderson:
High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits. EURASIP J. Adv. Signal Process. 2003(7): 676-689 (2003) - [j3]Tina A. Hudson, Julian A. Bragg, Paul E. Hasler, Stephen P. DeWeerth:
An analog VLSI model of muscular contraction. IEEE Trans. Circuits Syst. II Express Briefs 50(7): 329-342 (2003) - [c31]Abhishek Bandyopadhyay, Paul E. Hasler:
A fully programmable CMOS block matrix transform imager architecture. CICC 2003: 189-192 - 2002
- [j2]Brian K. Meadows, Ted H. Heath, Joseph D. Neff, Edgar A. Brown, David W. Fogliatti, Michael Gabbay, Visarath In, Paul E. Hasler, Stephen P. DeWeerth, William L. Ditto:
Nonlinear antenna technology. Proc. IEEE 90(5): 882-897 (2002) - [c30]Tyson S. Hall, Paul E. Hasler, David V. Anderson:
Field-Programmable Analog Arrays: A Floating-Gate Approach. FPL 2002: 424-433 - [c29]Paul E. Hasler, David V. Anderson:
Cooperative analog-digital signal processing. ICASSP 2002: 3972-3975 - [c28]Heejong Yoo, David V. Anderson, Paul E. Hasler:
Continuous-time audio noise suppression and real-time implementation. ICASSP 2002: 3980-3983 - [c27]Paul D. Smith, Paul E. Hasler:
Analog speech recognition project. ICASSP 2002: 3988-3991 - [c26]T. M. Massengill, Denise M. Wilson, Paul E. Hasler, David W. Graham:
Empirical comparison of analog and digital auditory preprocessing for automatic speech recognition. ISCAS (5) 2002: 77-80 - [c25]Julian A. Bragg, Edgar A. Brown, Paul E. Hasler, Stephen P. DeWeerth:
A silicon model of an adapting motoneuron. ISCAS (4) 2002: 261-264 - [c24]Joseph D. Neff, Brian K. Meadows, Edgar A. Brown, Stephen P. DeWeerth, Paul E. Hasler:
A CMOS coupled nonlinear oscillator array. ISCAS (4) 2002: 301-304 - [c23]Richard A. Blum, Charles S. Wilson, Paul E. Hasler, Stephen P. DeWeerth:
A CMOS imager with real-time frame differencing and centroid computation. ISCAS (3) 2002: 329-332 - [c22]Paul E. Hasler, Abhishek Bandyopadhyay, Paul D. Smith:
A matrix transform imager allowing high-fill factor. ISCAS (3) 2002: 337-340 - [c21]David W. Graham, Paul E. Hasler:
Capacitively-coupled current conveyer second-order section for continuous-time bandpass filtering and cochlea modeling. ISCAS (5) 2002: 485-488 - [c20]Paul D. Smith, Matt Kucic, Paul E. Hasler:
Accurate programming of analog floating-gate arrays. ISCAS (5) 2002: 489-492 - [c19]C. Duffy, Ethan Farquhar, Paul E. Hasler:
Practical issues using e-pot circuits. ISCAS (5) 2002: 493-496 - [c18]Christal Gordon, Paul E. Hasler:
Biological learning modeled in an adaptive floating-gate system. ISCAS (5) 2002: 609-612 - [c17]Paul D. Smith, Matt Kucic, Richard Ellis, Paul E. Hasler, David V. Anderson:
Mel-frequency cepstrum encoding in analog floating-gate circuitry. ISCAS (4) 2002: 671-674 - 2001
- [c16]Matt Kucic, Paul E. Hasler, Jeff Dugger, David V. Anderson:
Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits. ARVLSI 2001: 148-162 - 2000
- [c15]Charles S. Wilson, Paul E. Hasler, Stephen P. DeWeerth:
Synchrony detection for spike-mediated computation. ISCAS 2000: 305-308 - [c14]Julian A. Bragg, Reid R. Harrison, Paul E. Hasler, Stephen P. DeWeerth:
A floating-gate pFET based CMOS programmable analog memory cell array. ISCAS 2000: 339-342 - [c13]Matt Kucic, Ai Chen Low, Paul E. Hasler:
A programmable continuous-time analog Fourier processor based on floating-gate devices. ISCAS 2000: 351-354
1990 – 1999
- 1999
- [c12]Paul E. Hasler, Bradley A. Minch, Chris Diorio:
Adaptive Circuits Using pFET Floating-Gate Devices. ARVLSI 1999: 215-231 - [c11]Bradley A. Minch, Paul E. Hasler, Chris Diorio:
Synthesis of multiple-input translinear element networks. ISCAS (2) 1999: 236-239 - [c10]Paul E. Hasler, Jeff Dugger:
Correlation learning rule in floating-gate pFET synapses. ISCAS (5) 1999: 387-390 - [c9]Paul E. Hasler, Bradley A. Minch, Chris Diorio:
Floating-gate devices: they are not just for digital memories any more. ISCAS (2) 1999: 388-391 - [c8]Bradley A. Minch, Paul E. Hasler:
A floating-gate technology for digital CMOS processes. ISCAS (2) 1999: 400-403 - [c7]Paul E. Hasler, Paul D. Smith:
An autozeroing floating-gate amplifier with gain adaptation. ISCAS (2) 1999: 412-415 - 1998
- [j1]Paul E. Hasler, Andreas G. Andreou, Chris Diorio, Bradley A. Minch, Carver A. Mead:
Impact Ionization and Hot-Electron Injection Derived Consistently from Boltzmann Transport. VLSI Design 8(1-4): 454-461 (1998) - 1996
- [c6]W. Fritz Kruger, Paul E. Hasler, Bradley A. Minch, Christof Koch:
An Adaptive WTA using Floating Gate Technology. NIPS 1996: 720-726 - 1995
- [c5]Paul E. Hasler, Chris Diorio, Bradley A. Minch, Carver Mead:
Single Transistor Learning Synapse with Long Term Storage. ISCAS 1995: 1660-1663 - [c4]Chris Diorio, Sunit Mahajan, Paul E. Hasler, Bradley A. Minch, Carver Mead:
A High-Resolution Non-Volatile Analog Memory Cell. ISCAS 1995: 2233-2236 - [c3]Bradley A. Minch, Chris Diorio, Paul E. Hasler, Carver Mead:
A vMOS Soft-Maximum Current Mirror. ISCAS 1995: 2249-2252 - 1994
- [c2]Bradley A. Minch, Paul E. Hasler, Chris Diorio, Carver Mead:
A Silicon Axon. NIPS 1994: 739-746 - [c1]Paul E. Hasler, Chris Diorio, Bradley A. Minch, Carver Mead:
Single Transistor Learning Synapses. NIPS 1994: 817-824
Coauthor Index
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