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Emanuele Depaoli
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2010 – 2019
- 2019
- [j2]Emanuele Depaoli, Hongyang Zhang, Marco Mazzini, Walter Audoglio, Augusto Andrea Rossi, Guido Albasini, Massimo Pozzoni, Simone Erba, Enrico Temporiti, Andrea Mazzanti:
A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS. IEEE J. Solid State Circuits 54(1): 6-17 (2019) - 2018
- [c4]Emanuele Depaoli, Enrico Monaco, Giovanni Steffan, Marco Mazzini, Hongyang Zhang, Walter Audoglio, Oscar Belotti, Augusto Andrea Rossi, Guido Albasini, Massimo Pozzoni, Simone Erba, Andrea Mazzanti:
A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS. ISSCC 2018: 112-114 - 2017
- [c3]Giovanni Steffan, Emanuele Depaoli, Enrico Monaco, Nicolo Sabatino, Walter Audoglio, Augusto Andrea Rossi, Simone Erba, Matteo Bassi, Andrea Mazzanti:
6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI. ISSCC 2017: 116-117
2000 – 2009
- 2009
- [j1]Massimo Pozzoni, Simone Erba, Paolo Viola, Matteo Pisati, Emanuele Depaoli, Davide Sanzogni, Riccardo Brama, Daniele Baldi, Matteo Repossi, Francesco Svelto:
A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication. IEEE J. Solid State Circuits 44(4): 1306-1315 (2009) - 2008
- [c2]Simone Erba, Massimo Pozzoni, Matteo Pisati, Riccardo Brama, Davide Sanzogni, Emanuele Depaoli, Paolo Viola, Francesco Svelto:
A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR. CICC 2008: 559-562 - 2006
- [c1]Antonio Liscidini, Cesare Ghezzi, Emanuele Depaoli, Guido Albasini, Ivan Bietti, Rinaldo Castello:
Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End. CICC 2006: 25-28
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