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2020 – today
- 2024
- [c107]Davide Patti, Salvatore Monteleone, Enrico Russo, Maurizio Palesi, Vincenzo Catania:
A Novel Timechain-Level Approach to the Modeling of the Bitcoin Lightning Network. Blockchain 2024: 11-18 - [c106]Davide Patti, Salvatore Monteleone, Enrico Russo, Maurizio Palesi, Vincenzo Catania:
Abstracting Bitcoin Lightning Network Complexity with Ultraviolet. ICBC 2024: 528-530 - [c105]Enrico Russo, Francesco Giulio Blanco, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Vincenzo Catania:
Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning. ISCAS 2024: 1-5 - [i3]Enrico Russo, Francesco Giulio Blanco, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Vincenzo Catania:
Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning. CoRR abs/2403.00766 (2024) - [i2]Francesco Giulio Blanco, Enrico Russo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania:
Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator Systems. CoRR abs/2404.08950 (2024) - [i1]Enrico Russo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania:
Attention-Based Deep Reinforcement Learning for Qubit Allocation in Modular Quantum Architectures. CoRR abs/2406.11452 (2024) - 2023
- [j62]Enrico Russo, Maurizio Palesi, Davide Patti, Salvatore Monteleone, Giuseppe Ascia, Vincenzo Catania:
Multiobjective End-to-End Design Space Exploration of Parameterized DNN Accelerators. IEEE Internet Things J. 10(2): 1800-1812 (2023) - [c104]Enrico Russo, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Salvatore Monteleone, Vincenzo Catania:
Memory-Aware DNN Algorithm-Hardware Mapping via Integer Linear Programming. CF 2023: 134-143 - [c103]Hamaad Rafique, Davide Patti, Maurizio Palesi, Vincenzo Catania:
m-BMC: Exploration of Magnetic Field Measurements for Indoor Positioning Using mini-Batch Magnetometer Calibration. MOST 2023: 55-61 - 2022
- [j61]Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Andrea Mineo, Giuseppe Ascia, Vincenzo Catania:
DNN Model Compression for IoT Domain-Specific Hardware Accelerators. IEEE Internet Things J. 9(9): 6650-6662 (2022) - [c102]Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Vincenzo Catania:
MEDEA: A Multi-objective Evolutionary Approach to DNN Hardware Mapping. DATE 2022: 226-231 - [c101]Enrico Russo, Maurizio Palesi, Davide Patti, Habiba Lahdhiri, Salvatore Monteleone, Giuseppe Ascia, Vincenzo Catania:
Combined Application of Approximate Computing Techniques in DNN Hardware Accelerators. IPDPS Workshops 2022: 16-23 - [c100]Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Habiba Lahdhiri, Giuseppe Ascia, Vincenzo Catania:
Exploiting the Approximate Computing Paradigm with DNN Hardware Accelerators. MECO 2022: 1-4 - 2021
- [j60]Bruno Andò, Luciano Cantelli, Vincenzo Catania, Ruben Crispino, Dario Calogero Guastella, Salvatore Monteleone, Giovanni Muscato:
An Introduction to Patterns for the Internet of Robotic Things in the Ambient Assisted Living Scenario. Robotics 10(2): 56 (2021) - [c99]Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Vincenzo Catania:
LAMBDA: An Open Framework for Deep Neural Network Accelerators Simulation. PerCom Workshops 2021: 161-166 - 2020
- [j59]Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Impact of Users' Beliefs in Text-Based Linguistic Interaction. IEEE Access 8: 46861-46867 (2020) - [j58]Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose, Valerio Mario Salerno:
Exploiting Data Resilience in Wireless Network-on-chip Architectures. ACM J. Emerg. Technol. Comput. Syst. 16(2): 21:1-21:27 (2020) - [c98]Andrea Mineo, Maurizio Palesi, Davide Patti, Vincenzo Catania:
Cloud-Based Energy Efficient Scheme for Sigfox Monarch as Asset Tracking Service. COINS 2020: 1-6 - [c97]Habiba Lahdhiri, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Jordane Lorandel, Emmanuelle Bourdel, Vincenzo Catania:
DNNZip: Selective Layers Compression Technique in Deep Neural Network Accelerators. DSD 2020: 526-533 - [c96]Giuseppe Ascia, Vincenzo Catania, John Jose, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Improving Inference Latency and Energy of Network-on-Chip based Convolutional Neural Networks through Weights Compression. IPDPS Workshops 2020: 54-63 - [c95]Giuseppe Ascia, Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Improving Inference Latency and Energy of DNNs through Wireless Enabled Multi-Chip-Module-based Architectures and Model Parameters Compression. NOCS 2020: 1-6
2010 – 2019
- 2019
- [j57]Vincenzo Catania, Gaetano Carmelo La Delfa, Salvatore Monteleone, Davide Patti, Daniela Ventura, Giuseppe La Torre:
GOOSE: goal oriented orchestration for smart environments. Int. J. Ad Hoc Ubiquitous Comput. 32(3): 159-170 (2019) - [c94]Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose:
Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices. IoTSMS 2019: 227-234 - [c93]Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose:
Analyzing networks-on-chip based deep neural networks. NOCS 2019: 23:1-23:2 - 2018
- [j56]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Improving Energy Efficiency in Wireless Network-on-Chip Architectures. ACM J. Emerg. Technol. Comput. Syst. 14(1): 9:1-9:24 (2018) - [c92]Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose:
Approximate Wireless Networks-on-Chip. DCIS 2018: 1-6 - [c91]Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose:
Improving energy consumption of NoC based architectures through approximate communication. MECO 2018: 1-4 - [c90]Salvatore Michele Biondi, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
smARTworks: A Multi-sided Context-aware Platform for the Smart Museum. PECCS 2018: 241-247 - [c89]Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Packetization of Shared-Memory Traces for Message Passing Oriented NoC Simulation. ISC 2018: 311-325 - 2017
- [j55]Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Daniela Panno, Davide Patti:
User-Generated Services Composition in Smart Multi-User Environments. J. Sens. Actuator Networks 6(3): 20 (2017) - [c88]Salvatore Michele Biondi, Vincenzo Catania, Salvatore Monteleone, Carmelo Polito:
Bus as a sensor: A mobile sensor nodes network for the air quality monitoring. WiMob 2017: 272-277 - 2016
- [j54]Daniela Ventura, Aitor Gómez-Goiri, Vincenzo Catania, Diego López-de-Ipiña, J. A. M. Naranjo, Leocadio G. Casado:
Security analysis and resource requirements of group-oriented user access control for hardware-constrained wireless network services. Log. J. IGPL 24(1): 80-91 (2016) - [j53]Gaetano Carmelo La Delfa, Salvatore Monteleone, Vincenzo Catania, Juan F. De Paz, Javier Bajo:
Performance analysis of visualmarkers for indoor navigation systems. Frontiers Inf. Technol. Electron. Eng. 17(8): 730-740 (2016) - [j52]Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania:
Exploiting antenna directivity in wireless NoC architectures. Microprocess. Microsystems 43: 59-66 (2016) - [j51]Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Partha Pratim Pande, Vincenzo Catania:
On-Chip Communication Energy Reduction Through Reliability Aware Adaptive Voltage Swing Scaling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(11): 1769-1782 (2016) - [j50]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Cycle-Accurate Network on Chip Simulation with Noxim. ACM Trans. Model. Comput. Simul. 27(1): 4 (2016) - [j49]Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania:
Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC Architectures. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1535-1545 (2016) - [c87]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Improving the energy efficiency of wireless Network on Chip architectures through online selective buffers and receivers shutdown. CCNC 2016: 668-673 - [c86]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Energy efficient transceiver in wireless Network on Chip architectures. DATE 2016: 1321-1326 - [c85]Salvatore Michele Biondi, Salvatore Monteleone, Giuseppe La Torre, Vincenzo Catania:
A Context-Aware Smart Parking System. SITIS 2016: 450-454 - [c84]Giuseppe La Torre, Salvatore Monteleone, Marco Cavallo, Valeria D'Amico, Vincenzo Catania:
A Context-Aware Solution to Improve Web Service Discovery and User-Service Interaction. UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld 2016: 180-187 - [c83]Giuseppe Ascia, Vincenzo Catania, Raffaele Di Natale, Andrea Fornaia, Misael Mongiovì, Salvatore Monteleone, Giuseppe Pappalardo, Emiliano Tramontana:
Making Android Apps Data-Leak-Safe by Data Flow Analysis and Code Injection. WETICE 2016: 205-210 - 2015
- [j48]Maurizio Palesi, Davide Patti, Giuseppe Ascia, Daniela Panno, Vincenzo Catania:
Coupling Routing Algorithm and Data Encoding for Low Power Networks on Chip. J. Comput. Sci. 11(3): 552-566 (2015) - [j47]Vincenzo Catania, Andrea Araldo, Davide Patti:
Parameter Space Representation of Pareto Front to Explore Hardware-Software Dependencies. ACM Trans. Embed. Comput. Syst. 14(4): 77:1-77:25 (2015) - [c82]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Maurizio Palesi, Davide Patti:
Noxim: An open, extensible and cycle-accurate network on chip simulator. ASAP 2015: 162-163 - [c81]Daniela Ventura, Salvatore Monteleone, Giuseppe La Torre, Gaetano Carmelo La Delfa, Vincenzo Catania:
Smart EDIFICE - Smart EveryDay interoperating future devICEs. CTS 2015: 19-26 - [c80]Andrea Mineo, Mohd Shahrizal Rusli, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono:
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures. DATE 2015: 513-518 - [c79]Giuseppe Monteleone, Raffaele Di Natale, Piero Conca, Salvatore Michele Biondi, Antonio Rosario Intilisano, Vincenzo Catania, Daniela Panno:
A Decision Support System for Hotel Facilities Inventory Management. DEXA (1) 2015: 460-470 - [c78]Gaetano Carmelo La Delfa, Vincenzo Catania, Salvatore Monteleone, Juan Francisco de Paz, Javier Bajo:
Computer Vision Based Indoor Navigation: A Visual Markers Evaluation. ISAmI 2015: 165-173 - [c77]Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Daniela Panno, Davide Patti:
User-Generated services: Policy Management and access control in a cross-domain environment. IWCMC 2015: 668-673 - [c76]Daniela Ventura, Ruben Verborgh, Vincenzo Catania, Erik Mannens:
Autonomous Composition and Execution of REST APIs for Smart Sensors. SSN-TC/OrdRing@ISWC 2015: 13-24 - 2014
- [j46]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti:
Distributed topology discovery in self-assembled nano network-on-chip. Comput. Electr. Eng. 40(8): 292-306 (2014) - [c75]Davide Patti, Maurizio Palesi, Vincenzo Catania:
Merging Compilation and Microarchitectural Configuration Spaces for Performance/Power Optimization in VLIW-Based Systems. CSOC 2014: 203-212 - [c74]Davide Patti, Andrea Mineo, Salvatore Monteleone, Vincenzo Catania:
Topology Discovery in Deadlock Free Self-assembled DNA Networks. CSOC 2014: 301-311 - [c73]Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania:
An adaptive transmitting power technique for energy efficient mm-wave wireless NoCs. DATE 2014: 1-6 - [c72]Vincenzo Catania, Daniela Ventura:
An approch for monitoring and smart planning of urban solid waste management using smart-M3 platform. FRUCT 2014: 24-31 - [c71]Vincenzo Catania, Davide Patti, Mariagrazia Sciacca:
Introducing Consciousnet : Internet Content as an Environment for Human-Machine Interaction. HCI (2) 2014: 382-393 - [c70]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti:
A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks. MES 2014: 17-24 - [c69]Mohd Shahrizal Rusli, Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania, Muhammad N. Marsono:
A Closed Loop Control based Power Manager for WiNoC Architectures. MES 2014: 60-63 - [c68]Daniela Ventura, Diego Casado Mansilla, Juan Lopez-de-Armentia, Pablo Garaizar, Diego López-de-Ipiña, Vincenzo Catania:
ARIIMA: A Real IoT Implementation of a Machine-Learning Architecture for Reducing Energy Consumption. UCAmI 2014: 444-451 - 2013
- [c67]Giuseppe Ascia, Maurizio Palesi, Vincenzo Catania:
An Adaptive Output Selection Function Based on a Fuzzy Rule Base System for Network on Chip. DSD 2013: 505-512 - [c66]Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania:
Runtime Online Links Voltage Scaling for Low Energy Networks on Chip. DSD 2013: 941-944 - [c65]Andrea Mineo, Marina Masi, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania:
Low Energy Mapping Techniques under Reliability and Bandwidth Constraints. HPCC/EUC 2013: 2088-2095 - [c64]Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti:
A first effort for a distributed segment-based approach on self-assembled nano networks. NoCArc@MICRO 2013: 59-64 - [c63]Valerio Arena, Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Fabio Ricciato:
SecureDroid: An Android security framework extension for context-aware policy enforcement. PRISMS 2013: 1-8 - [c62]Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania:
NoC links energy reduction through link voltage scaling. ICSAMOS 2013: 113-120 - 2012
- [j45]Maurizio Palesi, Rafael Tornero, Juan Manuel Orduña, Vincenzo Catania, Daniela Panno:
Designing Robust Routing Algorithms and Mapping Cores in Networks-on-Chip: A Multi-objective Evolutionary-based Approach. J. Univers. Comput. Sci. 18(7): 937-969 (2012) - [j44]Davide Patti, Andrea Spadaccini, Maurizio Palesi, Fabrizio Fazzino, Vincenzo Catania:
Supporting Undergraduate Computer Architecture Students Using a Visual MIPS64 CPU Simulator. IEEE Trans. Educ. 55(3): 406-411 (2012) - [c61]Vincenzo Catania, Giuseppe La Torre, Salvatore Monteleone, Davide Patti, Stefano Vercelli, Fabio Ricciato:
A Novel Approach to Web of Things: M2M and Enhanced Javascript Technologies. GreenCom 2012: 726-730 - [c60]Alessandro G. Di Nuovo, Giuseppe Ascia, Vincenzo Catania:
A Study on Evolutionary Multi-Objective Optimization with Fuzzy Approximation for Computational Expensive Problems. PPSN (2) 2012: 102-111 - 2011
- [j43]Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti:
Performance evaluation of efficient multi-objective evolutionary algorithms for design space exploration of embedded computer systems. Appl. Soft Comput. 11(1): 382-398 (2011) - [j42]Maurizio Palesi, Giuseppe Ascia, Fabrizio Fazzino, Vincenzo Catania:
Data Encoding Schemes in Networks on Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(5): 774-786 (2011) - [p1]Maurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania:
Application-Specific Routing Algorithms for Low Power Network on Chip Design. Low Power Networks-on-Chip 2011: 113-150 - 2010
- [j41]Maurizio Palesi, Shashi Kumar, Vincenzo Catania:
Leveraging Partially Faulty Links Usage for Enhancing Yield and Performance in Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(3): 426-440 (2010) - [c59]Maurizio Palesi, Rickard Holsmark, Xiaohang Wang, Shashi Kumar, Mei Yang, Yingtao Jiang, Vincenzo Catania:
An Efficient Technique for In-order Packet Delivery with Adaptive Routing Algorithms in Networks on Chip. DSD 2010: 37-44
2000 – 2009
- 2009
- [j40]Maurizio Palesi, Shashi Kumar, Vincenzo Catania:
Bandwidth-aware routing algorithms for networks-on-chip platforms. IET Comput. Digit. Tech. 3(5): 413-429 (2009) - [j39]Maurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania:
Application Specific Routing Algorithms for Networks on Chip. IEEE Trans. Parallel Distributed Syst. 20(3): 316-330 (2009) - [c58]Maurizio Palesi, Fabrizio Fazzino, Giuseppe Ascia, Vincenzo Catania:
Data Encoding for Low-Power in Wormhole-Switched Networks-on-Chip. DSD 2009: 119-126 - [c57]Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti, Gianmarco De Francisci Morales:
An Effective Methodology to Multi-objective Design of Application Domain-specific Embedded Architectures. DSD 2009: 643-650 - [c56]Alessandro G. Di Nuovo, Santo Di Nuovo, Serafino Buono, Vincenzo Catania:
Feedforward artificial neural network to estimate iq of mental retarded people from different psychometric instruments. IJCNN 2009: 690-696 - [c55]Alessandro G. Di Nuovo, Vincenzo Catania:
Linguistic Modifiers to Improve the Accuracy-Interpretability Trade-Off in Multi-Objective Genetic Design of Fuzzy Rule Based Classifier Systems. ISDA 2009: 128-133 - 2008
- [j38]Alessandro G. Di Nuovo, Vincenzo Catania, Santo Di Nuovo, Serafino Buono:
Psychology with soft computing: An integrated approach and its applications. Appl. Soft Comput. 8(1): 829-837 (2008) - [j37]Vincenzo Catania, Maurizio Palesi, Davide Patti:
Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems. ACM Trans. Archit. Code Optim. 5(2): 11:1-11:33 (2008) - [j36]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
Implementation and Analysis of a New Selection Strategy for Adaptive Routing in Networks-on-Chip. IEEE Trans. Computers 57(6): 809-820 (2008) - [c54]Dario Frazzetta, Giuseppe Dimartino, Maurizio Palesi, Shashi Kumar, Vincenzo Catania:
Efficient Application Specific Routing Algorithms for NoC Systems utilizing Partially Faulty Links. DSD 2008: 18-25 - [c53]Vincenzo Catania, Gianmarco De Francisci Morales, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti:
High Performance Computing for Embedded System Design: A Case Study. DSD 2008: 656-659 - [c52]Alessandro G. Di Nuovo, Vincenzo Catania:
An evolutionary fuzzy c-means approach for clustering of bio-informatics databases. FUZZ-IEEE 2008: 2077-2082 - [c51]Maurizio Palesi, Giuseppe Longo, Salvatore Signorino, Rickard Holsmark, Shashi Kumar, Vincenzo Catania:
Design of Bandwidth Aware and Congestion Avoiding Efficient Routing Algorithms for Networks-on-Chip Platforms. NOCS 2008: 97-106 - 2007
- [j35]Vincenzo Catania, Maurizio Palesi, Davide Patti:
Analysis and Tools for the Design of VLIW Embedded Systems in a Multi-Objective Scenario. J. Circuits Syst. Comput. 16(5): 819-846 (2007) - [j34]Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti:
Efficient design space exploration for application specific systems-on-a-chip. J. Syst. Archit. 53(10): 733-750 (2007) - [c50]Alessandro G. Di Nuovo, Maurizio Palesi, Vincenzo Catania:
Multi-Objective Evolutionary Fuzzy Clustering for High-Dimensional Problems. FUZZ-IEEE 2007: 1-6 - [c49]Alessandro G. Di Nuovo, Vincenzo Catania:
On External Measures for Validation of Fuzzy Partitions. IFSA (1) 2007: 491-501 - [c48]Maurizio Palesi, Shashi Kumar, Rickard Holsmark, Vincenzo Catania:
Exploiting Communication Concurrency for Efficient Deadlock Free Routing in Reconfigurable NoC Platforms. IPDPS 2007: 1-8 - 2006
- [j33]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip. J. Univers. Comput. Sci. 12(4): 370-394 (2006) - [j32]Giuseppe Ascia, Vincenzo Catania, Daniela Panno:
An integrated fuzzy-GA approach for buffer management. IEEE Trans. Fuzzy Syst. 14(4): 528-541 (2006) - [c47]Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti:
A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design. IEEE Congress on Evolutionary Computation 2006: 1736-1743 - [c46]Maurizio Palesi, Rickard Holsmark, Shashi Kumar, Vincenzo Catania:
A methodology for design of application specific deadlock-free routing algorithms for NoC systems. CODES+ISSS 2006: 142-147 - [c45]Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania:
Fuzzy decision making in embedded system design. CODES+ISSS 2006: 223-228 - [c44]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
Neighbors-on-Path: A New Selection Strategy for On-Chip Networks. ESTIMedia 2006: 79-84 - [c43]Alessandro G. Di Nuovo, Vincenzo Catania:
An Efficient Approach for the Design of Transparent Fuzzy Rule-Based Classifiers. FUZZ-IEEE 2006: 1381-1387 - [c42]Alessandro G. Di Nuovo, Vincenzo Catania, Santo Di Nuovo, Serafino Buono:
Evolving Fuzzy C-Means: An intelligent technique for efficient diagnosis of children mental retardation level from databases with missing values. IC-AI 2006: 290-296 - [c41]Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti:
An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design. ICSAMOS 2006: 115-122 - [c40]Alessandro G. Di Nuovo, Vincenzo Catania:
Genetic Tuning of Fuzzy Rule Deep Structures for Efficient Knowledge Extraction from Medical Data. SMC 2006: 5053-5058 - 2005
- [j31]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
A multiobjective genetic approach for system-level exploration in parameterized systems-on-a-chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(4): 635-645 (2005) - [j30]Giuseppe Ascia, Vincenzo Catania, Daniela Panno:
An evolutionary management scheme in high-performance packet switches. IEEE/ACM Trans. Netw. 13(2): 262-275 (2005) - [c39]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
Exploring Design Space of VLIW Architectures. ASAP 2005: 86-91 - [c38]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems. ASP-DAC 2005: 940-943 - [c37]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
An evolutionary approach to network-on-chip mapping problem. Congress on Evolutionary Computation 2005: 112-119 - [c36]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
Hyperblock formation: a power/energy perspective for high performance VLIW architectures. ISCAS (4) 2005: 4090-4093 - 2004
- [j29]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
A GA-based design space exploration framework for parameterized system-on-a-chip platforms. IEEE Trans. Evol. Comput. 8(4): 329-346 (2004) - [c35]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
Multi-objective mapping for mesh-based NoC architectures. CODES+ISSS 2004: 182-187 - [c34]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
Multi-objective Optimization of a Parameterized VLIW Architecture. Evolvable Hardware 2004: 191-198 - 2003
- [c33]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Antonio Parlato:
An evolutionary approach for reducing the switching activity in address buses. IEEE Congress on Evolutionary Computation 2003: 107-114 - [c32]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti:
EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration. ESTIMedia 2003: 65-72 - [c31]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Antonio Parlato:
An evolutionary approach for reducing the energy in address buses. ISICT 2003: 76-81 - [c30]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems. PATMOS 2003: 21-30 - [c29]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
A Genetic Approach To Bus Encoding. VLSI-SOC 2003: 426-431 - 2002
- [c28]Giuseppe Ascia, Vincenzo Catania, Daniela Panno:
An efficient buffer management policy based on an integrated Fuzzy-GA approach. INFOCOM 2002: 1042-1048 - [c27]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
A Framework for Design Space Exploration of Parameterized VLSI Systems. ASP-DAC/VLSI Design 2002: 245-250 - 2001
- [j28]Vincenzo Catania, Giuseppe Ficili, Daniela Panno:
An integrated framework for traffic control in ATM networks based on soft-computing techniques. Inf. Sci. 138(1-4): 31-44 (2001) - [j27]Giuseppe Ascia, Vincenzo Catania, Daniela Panno:
An efficient fuzzy system for traffic management in high-speed packet-switched networks. Soft Comput. 5(4): 247-256 (2001) - [j26]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Sarta:
An Instruction-Level Power Analysis Model with Data Dependency. VLSI Design 12(2): 245-273 (2001) - [c26]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
Parameterised system design based on genetic algorithms. CODES 2001: 177-182 - [c25]Giuseppe Ascia, Vincenzo Catania:
A General Purpose Processor Oriented Fuzzy Reasoning. FUZZ-IEEE 2001: 352-355 - [c24]Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi:
An Evolutionary Approach for Pareto-optimal Configurations in SOC Platforms. VLSI-SOC 2001: 157-168 - [c23]Giuseppe Ascia, Vincenzo Catania, Giuseppe Ficili, Daniela Panno:
A Fuzzy Buffer Management Scheme For ATM and IP Networks. INFOCOM 2001: 1539-1547 - [c22]Giuseppe Ascia, Vincenzo Catania, Daniela Panno:
An adaptive fuzzy threshold scheme for high performance shared-memory switches. SAC 2001: 456-461 - 2000
- [c21]Giuseppe Ascia, Vincenzo Catania:
A pipeline parallel architecture for a fuzzy inference processor. FUZZ-IEEE 2000: 257-262
1990 – 1999
- 1999
- [j25]Vincenzo Catania, Giuseppe Ficili, Daniela Panno:
On the impact of traffic control algorithms on resource management in ATM networks. Comput. Commun. 22(3): 258-265 (1999) - [j24]Giuseppe Ascia, Vincenzo Catania, Marco Russo:
VLSI hardware architecture for complex fuzzy systems. IEEE Trans. Fuzzy Syst. 7(5): 553-570 (1999) - [c20]Vincenzo Catania, Giuseppe Ficili, Daniela Panno:
A Framework for Traffic Control in Integrated Services Networks Based on Fuzzy Logic. Applied Informatics 1999: 427-429 - [c19]Giuseppe Ascia, Vincenzo Catania:
An Optimized Parallel RISC Processor for Fuzzy Computing. Applied Informatics 1999: 454-456 - 1998
- [c18]Giuseppe Ascia, Vincenzo Catania:
A Framework for a Parallel Architecture Dedicated to Soft Computing. VLSI Design 1998: 318-321 - 1997
- [j23]Vincenzo Catania, Michele Malgeri, Marco Russo:
Applying fuzzy logic to codesign partitioning. IEEE Micro 17(3): 62-70 (1997) - [j22]Giuseppe Ascia, Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno:
A VLSI fuzzy expert system for real-time traffic control in ATM networks. IEEE Trans. Fuzzy Syst. 5(1): 20-31 (1997) - [c17]Vincenzo Catania, Giuseppe Ficili, Daniela Panno:
An assessment of resource exploitation using artificial intelligence based traffic control strategies. ISCC 1997: 162-166 - [c16]Giuseppe Ascia, Vincenzo Catania, Giuseppe Ficili:
Design of a VLSI Hardware PET Decoder. VLSI Design 1997: 253-256 - 1996
- [j21]Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno:
Using fuzzy logic in ATM source traffic control: lessons and perspectives. IEEE Commun. Mag. 34(11): 70-74 (1996) - [j20]Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita:
Monitoring performance in distributed systems. Comput. Commun. 19(9-10): 788-803 (1996) - [j19]Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita:
An I/O subsystem supporting mass storage functions in parallel systems. Comput. Stand. Interfaces 18(2): 117-138 (1996) - [j18]Giuseppe Ascia, Vincenzo Catania:
An Efficient Hardware Architecture to Support Complex Fuzzy Reasoning. Int. J. Artif. Intell. Tools 5(1-2): 41-60 (1996) - [j17]Giuseppe Ascia, Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
A Reconfigurable Parallel Architecture for a Fuzzy Processor. Inf. Sci. 88(1-4): 299-315 (1996) - [j16]Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
A Fuzzy Approach to Mapping Problems. Inf. Sci. 95(3): 191-217 (1996) - [j15]Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno:
A comparative analysis of fuzzy versus conventional policing mechanisms for ATM networks. IEEE/ACM Trans. Netw. 4(3): 449-459 (1996) - [c15]Vincenzo Catania, Salvatore Cavalieri, Marco Russo:
Tuning Hopfield neural network by a fuzzy approach. ICNN 1996: 1067-1072 - 1995
- [j14]Vincenzo Catania, Giuseppe Ascia:
A VLSI Parallel Architecture for Fuzzy Expert Systems. Int. J. Pattern Recognit. Artif. Intell. 9(2): 421-447 (1995) - [j13]Abraham Kandel, Giuseppe Ascia, Vincenzo Catania, Biagio Giacalone, Marco Russo, Lorenzo Vita, Andrés Jaramillo-Botero, Yoichi Miyake, Hua Harry Li, Nowell Godfrey, Yuandong Ji, Shuwei Guo, Liliane Peters, Krishna Rao Valavala, Mahmoud A. Manzoul, Antonio Ruiz, Julio Gutiérrez, Felipe Fernández:
Fuzzy Hardware Challenges. IEEE Micro 15(6): 61-67 (1995) - [j12]Giuseppe Ascia, Vincenzo Catania, Biagio Giacalone, Marco Russo, Lorenzo Vita:
Designing for parallel fuzzy computing. IEEE Micro 15(6): W1-W11 (1995) - [j11]Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita:
Design and Performance Analysis of a Disk Array System. IEEE Trans. Computers 44(10): 1236-1247 (1995) - [c14]Vincenzo Catania, N. Fiorito, Michele Malgeri, Marco Russo:
A soft computing approach to hardware software codesign. Great Lakes Symposium on VLSI 1995: 158-163 - [c13]Vincenzo Catania, Giuseppe Ficili, Sergio Palazzo, Daniela Panno:
A fuzzy decision maker for source traffic control in high speed networks. ICNP 1995: 136-143 - [c12]Giuseppe Ascia, Vincenzo Catania:
An efficient hardware architecture to support complex fuzzy reasoning. ICTAI 1995: 250-257 - [c11]Vincenzo Catania, N. Fiorito, Michele Malgeri, Marco Russo:
A Framework for Codesign Based on Fuzzy Logic and Genetic Algorithms. IEA/AIE 1995: 797-804 - [c10]Vincenzo Catania, Marco Russo:
Analog gates for a VLSI fuzzy processor. VLSI Design 1995: 299-304 - [c9]Giuseppe Ascia, Vincenzo Catania:
Design of a VLSI parallel processor for fuzzy computing. VLSI Design 1995: 315-320 - 1994
- [j10]Salvatore Casale, Vincenzo Catania, Aurelio La Corte:
Service integration issues on an ATM DQDB MAN. Comput. Commun. 17(6): 407-418 (1994) - [j9]Vincenzo Catania, Aurelio La Corte, Antonio Puliafito, Lorenzo Vita:
A Simulation Study of DQDB Metropolitan Area Network. Simul. 62(3): 158-171 (1994) - [j8]Vincenzo Catania, Antonio Puliafito, Marco Russo, Lorenzo Vita:
A VLSI fuzzy inference processor based on a discrete analog approach. IEEE Trans. Fuzzy Syst. 2(2): 93-106 (1994) - [j7]Salvatore Casale, Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
A remote bridging technique to increase performability in distributed systems. IEEE Trans. Ind. Electron. 41(2): 182-190 (1994) - [c8]Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita:
Performance Evaluation of a Partial Dynamic Declustering Disk Array System. HPDC 1994: 244-252 - [c7]Vincenzo Catania, O. Granato, Antonio Puliafito, Lorenzo Vita:
PMT: A Tool to Monitor Performances in Distributed Systems. HPDC 1994: 279-286 - 1993
- [j6]Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
A Model for Performance Evaluation of Gracefully Degrading Systems. Comput. J. 36(2): 177-185 (1993) - [j5]Salvatore Casale, Vincenzo Catania, Aurelio La Corte, Lorenzo Vita:
Service management on an ATM DQDB MAN. Comput. Commun. 16(3): 147-154 (1993) - [j4]Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
High-speed data service in distributed systems based on SMDS. Comput. Commun. 16(7): 394-402 (1993) - [j3]Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
A modeling framework to evaluate performability parameters in gracefully degrading systems. IEEE Trans. Ind. Electron. 40(5): 461-472 (1993) - 1991
- [j2]Vincenzo Catania, Salvatore Cavalieri, Lorenzo Vita:
Rearrangeable switch fabric for fast packet switching. Comput. Commun. 14(8): 451-460 (1991) - [c6]Vincenzo Catania, L. Mazzola, Antonio Puliafito, Lorenzo Vita:
Performance analysis of DQDB behaviour with priority levels. ICDCS 1991: 44-51 - [c5]Vincenzo Catania, Mario Gerla, Claudio Pavanelli:
A Routing Strategy for MAN Interconnection. INFOCOM 1991: 608-615 - [c4]Giovanni Marotta, M. Iudica, M. Tiraboschi, Vincenzo Catania, Lorenzo Vita, Andres Albanese, Tasco N. Devetzis, M. W. Maszczak:
Internetworking data services. LCN 1991: 223-229 - 1990
- [c3]Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
Availability and Performability Assessment in LAN Interconnection. INFOCOM 1990: 1181-1187
1980 – 1989
- 1989
- [j1]Salvatore Casale, Vincenzo Catania, Alberto Faro, Nikolai Parchenkov, Lorenzo Vita:
Design and performance evaluation of an optical fibre LAN with double token rings. Comput. Commun. 12(3): 158-166 (1989) - [c2]Salvatore Casale, Vincenzo Catania, Antonio Puliafito, Lorenzo Vita:
A Multiple Spanning Tree Protocol in Bridged LANs. IFIP Congress 1989: 633-638 - 1988
- [c1]Salvatore Casale, Vincenzo Catania, Lorenzo Vita:
Fault tolerance increasing in token ring LANs. LCN 1988: 446-452
Coauthor Index
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