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"A low active and leakage power SRAM using a read and write divided and ..."
Jiafeng Zhu, Na Bai, Jianhui Wu (2013)
- Jiafeng Zhu, Na Bai, Jianhui Wu:
A low active and leakage power SRAM using a read and write divided and BIST programmable timing control circuit. Microelectron. J. 44(4): 283-291 (2013)
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