"A 120-Gbit/s 1.27-W 520-mVpp 2: 1 Multiplexer IC Using Self-Aligned ..."

Yutaka Arayashiki et al. (2010)

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DOI: 10.1587/TRANSELE.E93.C.1273

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type: Journal Article

metadata version: 2020-04-11

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Yutaka Arayashiki, Yukio Ohkubo, Taisuke Matsumoto, Yoshiaki Amano, Akio Takagi, Yutaka Matsuoka:
A 120-Gbit/s 1.27-W 520-mVpp 2: 1 Multiplexer IC Using Self-Aligned InP/InGaAs/InP DHBTs with Emitter Mesa Passivation. IEICE Trans. Electron. 93-C(8): 1273-1278 (2010)

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