"A Linear Time Algorithm for Wire Sizing with Simultaneous Optimization of ..."

Narender Hanchate, Nagarajan Ranganathan (2006)

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DOI: 10.1109/VLSID.2006.11

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Narender Hanchate, Nagarajan Ranganathan:
A Linear Time Algorithm for Wire Sizing with Simultaneous Optimization of Interconnect Delay and Crosstalk Noise. VLSI Design 2006: 283-290

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