"Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through ..."

Manuel E. Acacio et al. (2002)

> Home

Details and statistics

DOI: 10.1109/EMPDP.2002.994312

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/pdp/AcacioGGD02
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/pdp/AcacioGGD02
Manuel E. Acacio, José González, José M. García, José Duato:
Reducing the Latency of L2 Misses in Shared-Memory Multiprocessors through On-Chip Directory Integration. PDP 2002: 368-375

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.