"Power constraint testing for multi-clock domain SoCs using concurrent ..."

M. H. Haghbayan, Saeed Safari, Zainalabedin Navabi (2012)

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DOI: 10.1109/DDECS.2012.6219022

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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M. H. Haghbayan, Saeed Safari, Zainalabedin Navabi:
Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST. DDECS 2012: 42-45

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