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"Practical methodology of post-layout gate sizing for 15% more power saving."
Noriyuki Miura, Naoki Kato, Tadahiro Kuroda (2004)
- Noriyuki Miura, Naoki Kato, Tadahiro Kuroda:
Practical methodology of post-layout gate sizing for 15% more power saving. ASP-DAC 2004: 434-437
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