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ORCIDTao He 0001
Person information
- affiliation: Oregon State University, School of Electrical Engineering and Computer Science, Corvallis, OR, USA
Other persons with the same name
- Tao He — disambiguation page
- Tao He 0002
![[0000-0003-2079-7988]](https://dblp.org/img/orcid-mark.12x12.png "0000-0003-2079-7988")
— Wuhan University, School of Remote Sensing and Information Engineering, China (and 1 more) - Tao He 0003 — University of Iowa, Department of Radiology, Iowa City, IA, USA
- Tao He 0004 — Shanghai University, School of Computer Engineering and Science, Shanghai Key Laboratory of Computer Software Evaluating and Testing, China
- Tao He 0005 — Peking University, Beijing, China
- Tao He 0006 — Chongqing University, State Key Laboratory of Power Transmission Equipment and System Security and New Technology, China
- Tao He 0007 — Monash University, Clayton, VIC, Australia
- Tao He 0008 — Tsinghua University, Department of Computer Science and Technology, Beijing, China
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2020 – today
- 2021
[c18]Yanchao Wang, Siladitya Dey, Tao He, Lukang Shi, Jiawei Zheng, Manjunath Kareppagoudr, Yi Zhang, Kazuki Sobue, Koichi Hamashita, Koji Tomioka, Gabor C. Temes:
A Hybrid Continuous Time Incremental and SAR Two-Step ADC with 90.5dB DR over 1MHz BW. A-SSCC 2021: 1-3- 2020
- [c17]Pedram Payandehnia, Tao He, Yanchao Wang, Gabor C. Temes:
Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial. CICC 2020: 1-8
2010 – 2019
- 2019
- [j6]Tao He, Manjunath Kareppagoudr, Yi Zhang, Emanuel Caceres, Un-Ku Moon, Gabor C. Temes:
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1331-1341 (2019) - 2018
- [c16]Tao He, Gabor C. Temes:
System-level noise filtering and linearization. CICC 2018: 1-8 - [c15]Tao He, Michael Ashburn, Stacy Ho, Yi Zhang, Gabor C. Temes:
A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR. ISSCC 2018: 230-232 - [c14]Yanchao Wang, Lukang Shi, Tao He, Yi Zhang, Chia-Hung Chen, Gabor C. Temes:
Robust Continuous-Time MASH Delta Sigma Modulator. MWSCAS 2018: 310-313 - 2017
- [j5]Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting. IEEE J. Solid State Circuits 52(4): 1066-1076 (2017) - [c13]Yi Zhang, Chia-Hung Chen, Tao He, Kazuki Sobue, Koichi Hamashita, Gabor C. Temes:
A two-capacitor SAR-assisted multi-step incremental ADC with a single amplifier achieving 96.6 dB SNDR over 1.2 kHz BW. CICC 2017: 1-4 - [c12]Tao He, Chia-Hung Chen, Yi Zhang, Gabor C. Temes:
Incremental ADC with parallel counting. MWSCAS 2017: 1017-1020 - [c11]Tao He, Manjunath Kareppagoudr, Un-Ku Moon, Gabor C. Temes, Yi Zhang:
Pseudo-pseudo-differential circuits. MWSCAS 2017: 1517-1520 - 2016
- [c10]Chia-Hung Chen, Yi Zhang, Tao He, Gabor C. Temes:
An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces. ISCAS 2016: 77-80 - [c9]Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator. VLSI Circuits 2016: 1-2 - 2015
- [j4]Chia-Hung Chen, Tao He, Yi Zhang, Gabor C. Temes:
Incremental Analog-to-Digital Converters for High-Resolution Energy-Efficient Sensor Interfaces. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(4): 612-623 (2015) - [j3]Chia-Hung Chen, Yi Zhang, Tao He, Patrick Yin Chiang, Gabor C. Temes:
A Micro-Power Two-Step Incremental Analog-to-Digital Converter. IEEE J. Solid State Circuits 50(8): 1796-1808 (2015) - [j2]Xin Meng, Yi Zhang, Tao He, Gabor C. Temes:
Low-Distortion Wideband Delta-Sigma ADCs With Shifted Loop Delays. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(2): 376-384 (2015) - [j1]Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A Continuous-Time Delta-Sigma Modulator for Biomedical Ultrasound Beamformer Using Digital ELD Compensation and FIR Feedback. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(7): 1689-1698 (2015) - [c8]Xin Meng, Jinzhou Cao, Tao He, Yi Zhang, Gabor C. Temes, Mitsuru Aniya, Kazuki Sobue, Koichi Hamashita:
A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays. ESSCIRC 2015: 221-224 - [c7]Tao He, Yi Zhang, Xin Meng, Gabor C. Temes, Chia-Hung Chen:
A 16-bit 1KHz bandwidth micro-power multi-step incremental ADC for multi-channel sensor interface. ISCAS 2015: 1018-1021 - [c6]Xin Meng, Yi Zhang, Tao He, Pedram Payandehnia, Gabor C. Temes:
A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays. ISCAS 2015: 2045-2048 - 2014
- [c5]Yi Zhang, Chia-Hung Chen, Tao He, Xin Meng, Nancy Qian, Ed Liu, Phillip Elliott, Gabor C. Temes:
A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback. A-SSCC 2014: 321-324 - [c4]Chia-Hung Chen, Yi Zhang, Tao He, Patrick Yin Chiang, Gabor C. Temes:
A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces. CICC 2014: 1-4 - [c3]Yi Zhang, Chia-Hung Chen, Tao He, Xin Meng, Gabor C. Temes:
A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation. ISCAS 2014: 934-937 - [c2]Xin Meng, Yi Zhang, Tao He, Gabor C. Temes:
A noise-coupled low-distortion delta-sigma ADC with shifted loop delays. MWSCAS 2014: 587-590 - [c1]Xin Meng, Tao He, Yi Zhang, Gabor C. Temes:
Double-sampled wideband delta-sigma ADCs with shifted loop delays. MWSCAS 2014: 1045-1048
Coauthor Index
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