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2020 – today
- 2024
[j20]Iman Firmansyah
, Yoshiki Yamaguchi, Tsutomu Maruyama, Yuta Matsuura, Heming Zhang, Shin Kawai, Hajime Nobuhara:
FPGA-based stereo matching for crop height measurement using monocular camera. Microprocess. Microsystems 108: 105063 (2024)- 2023
- [j19]Kento Tajiri, Tsutomu Maruyama:
FPGA Acceleration of a Composite Kernel SVM for Hyperspectral Image Classification. IEEE Access 11: 214-226 (2023) - [c96]Yoshiki Kunimoto, Qiong Chang, Yoshiki Yamaguchi, Tsutomu Maruyama:
GPU Acceleration of Multi-Object Tracking with Motion Vector Interpolation and Affine Transformation. ASAP 2023: 127-134 - 2022
- [j18]Qiong Chang, Aolong Zha, Weimin Wang, Xin Liu, Masaki Onishi, Lei Lei, Meng Joo Er, Tsutomu Maruyama:
Efficient stereo matching on embedded GPUs with zero-means cross correlation. J. Syst. Archit. 123: 102366 (2022) - [c95]Yuzuki Mimura, Qiong Chang, Tsutomu Maruyama:
Acceleration of video stabilization using embedded GPU. ASAP 2022: 52-59 - [c94]Yoshiki Kunimoto, Tsutomu Maruyama:
Object Detection and Tracking using CouNT and Motion Vectors on FPGA. HEART 2022: 108-111 - [i3]Qiong Chang, Masaki Onishi, Tsutomu Maruyama:
Fast convolution kernels on pascal GPU with high memory efficiency. CoRR abs/2212.00404 (2022) - [i2]Qiong Chang, Aolong Zha, Weimin Wang, Xin Liu, Masaki Onishi, Lei Lei, Meng Joo Er, Tsutomu Maruyama:
Efficient stereo matching on embedded GPUs with zero-means cross correlation. CoRR abs/2212.00476 (2022) - [i1]Qiong Chang, Tsutomu Maruyama:
Real-Time High-Quality Stereo Matching System on a GPU. CoRR abs/2212.00488 (2022) - 2020
- [c93]Qiong Chang, Aolong Zha, Weimin Wang, Xin Liu, Masaki Onishi, Tsutomu Maruyama:
Z2-ZNCC: ZigZag Scanning based Zero-means Normalized Cross Correlation for Fast and Accurate Stereo Matching on Embedded GPU. ICCD 2020: 597-600
2010 – 2019
- 2019
- [c92]Hayato Koizumi, Tsutomu Maruyama:
An Implementation of Non-Local Means Algorithm on FPGA. PARCO 2019: 681-690 - 2018
- [j17]Qiong Chang, Tsutomu Maruyama:
Real-Time Stereo Vision System: A Multi-Block Matching on GPU. IEEE Access 6: 42030-42046 (2018) - [c91]Qiong Chang, Tsutomu Maruyama:
Real-Time High-Quality Stereo Matching System on a GPU. ASAP 2018: 1-8 - [c90]Takuya Yamazaki, Tsutomu Maruyama:
An FPGA Implementation of Robust Matting. FPT 2018: 254-257 - [c89]Kento Tajiri, Tsutomu Maruyama:
FPGA Acceleration of a Supervised Learning Method for Hyperspectral Image Classification. FPT 2018: 270-273 - [c88]Qiong Chang, Masaki Onishi, Tsutomu Maruyama:
Fast convolution kernels on pascal GPU with high memory efficiency. SpringSim (HPC) 2018: 3:1-3:12 - [p1]Tsutomu Maruyama, Yoshiki Yamaguchi, Yasunori Osana:
Programmable Logic Devices (PLDs) in Practical Applications. Principles and Structures of FPGAs 2018: 179-205 - 2017
- [j16]Henry Block, Tsutomu Maruyama:
FPGA Hardware Acceleration of a Phylogenetic Tree Reconstruction with Maximum Parsimony Algorithm. IEICE Trans. Inf. Syst. 100-D(2): 256-264 (2017) - [j15]Yoko Sogabe, Tsutomu Maruyama:
A Fast and Accurate FPGA System for Short Read Mapping Based on Parallel Comparison on Hash Table. IEICE Trans. Inf. Syst. 100-D(5): 1016-1025 (2017) - [j14]Kenji Kanazawa, Tsutomu Maruyama:
An Approach for Solving SAT/MaxSAT-Encoded Formal Verification Problems on FPGA. IEICE Trans. Inf. Syst. 100-D(8): 1807-1818 (2017) - [c87]Henry Block, Tsutomu Maruyama:
An FPGA hardware implementation approach for a phylogenetic tree reconstruction algorithm with incremental tree optimization. FPL 2017: 1-8 - [c86]Ryouhei Maeda, Tsutomu Maruyama:
An implementation method of poisson image editing on FPGA. FPL 2017: 1-6 - 2016
- [c85]Sichao Wang, Tsutomu Maruyama:
An implementation method of the box filter on FPGA. FPL 2016: 1-8 - 2015
- [j13]Dang Ba Khac Trieu, Tsutomu Maruyama:
Real-time color image segmentation based on mean shift algorithm using an FPGA. J. Real Time Image Process. 10(2): 345-356 (2015) - [c84]Henry Block, Tsutomu Maruyama:
An FPGA implementation of a phylogenetic tree reconstruction algorithm using an alternative second-pass optimization. FPL 2015: 1-4 - [c83]Yoko Sogabe, Tsutomu Maruyama:
A variable length hash method for faster short read mapping on FPGA. FPL 2015: 1-6 - [c82]Masayuki Suzuki, Tsutomu Maruyama:
FPGA Acceleration of SAT Preprocessor. PARCO 2015: 515-524 - 2014
- [j12]Haruhisa Tsuyama, Tsutomu Maruyama:
GPU and FPGA Acceleration of Level Set Method. SIGARCH Comput. Archit. News 42(4): 21-25 (2014) - [j11]Yu Tanabe, Tsutomu Maruyama:
Fast and Accurate Optical Flow Estimation using FPGA. SIGARCH Comput. Archit. News 42(4): 27-32 (2014) - [j10]Minxi Jin, Tsutomu Maruyama:
Fast and Accurate Stereo Vision System on FPGA. ACM Trans. Reconfigurable Technol. Syst. 7(1): 3:1-3:24 (2014) - [c81]Yu Tanabe, Tsutomu Maruyama:
FPGA Implementation of Optical Flow Algorithm Based on Cost Aggregation. FCCM 2014: 175 - [c80]Henry Block, Tsutomu Maruyama:
An FPGA hardware acceleration of the indirect calculation of tree lengths method for phylogenetic tree reconstruction. FPL 2014: 1-4 - [c79]Kenji Kanazawa, Tsutomu Maruyama:
FPGA acceleration of SAT/Max-SAT solving using variable-way cache. FPL 2014: 1-4 - [c78]Youkou Sogabe, Tsutomu Maruyama:
FPGA acceleration of short read mapping based on sort and parallel comparison. FPL 2014: 1-4 - [c77]Yuto Kawabata, Takeshi Masuda, Tsutomu Maruyama:
Annotation technology progress and evaluation for more accurate operations in global network environment. NOMS 2014: 1-15 - 2013
- [c76]Henry Block, Tsutomu Maruyama:
A hardware acceleration of a phylogenetic tree reconstruction with maximum parsimony algorithm using FPGA. FPT 2013: 318-321 - [c75]Yoko Sogabe, Tsutomu Maruyama:
An acceleration method of short read mapping using FPGA. FPT 2013: 350-353 - [c74]Daichi Kobori, Tsutomu Maruyama:
Interactive Graph Cuts using FPGA. PARCO 2013: 532-539 - [c73]Hisaaki Kurita, Tsutomu Maruyama:
An Image Filter System based on dynamic partial reconfiguration on FPGA. PARCO 2013: 540-547 - 2012
- [j9]Zheng Zhi Shun, Tsutomu Maruyama:
FPGA acceleration of CDO pricing based on correlation expansions. SIGARCH Comput. Archit. News 40(5): 40-45 (2012) - [c72]Minxi Jin, Tsutomu Maruyama:
A real-time stereo vision system using a tree-structured dynamic programming on FPGA. FPGA 2012: 21-24 - [c71]Daichi Kobori, Tsutomu Maruyama:
An acceleration of a graph cut segmentation with FPGA. FPL 2012: 407-413 - [c70]Haruhisa Tsuyama, Tsutomu Maruyama:
An FPGA acceleration of a level set segmentation method. FPL 2012: 414-420 - [c69]Chunmeng Bi, Tsutomu Maruyama:
Real-time corner and polygon detection system on FPGA. FPL 2012: 451-457 - [c68]Minxi Jin, Tsutomu Maruyama:
A fast and high quality stereo matching algorithm on FPGA. FPL 2012: 507-510 - [c67]Dang Ba Khac Trieu, Tsutomu Maruyama:
A region merging approach for image segmentation on FPGA. FPL 2012: 739-742 - 2011
- [c66]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for SAT-Encoded Formal Verification Problems. FPL 2011: 38-43 - [c65]Dang Ba Khac Trieu, Tsutomu Maruyama:
An Implementation of the Mean Shift Filter on FPGA. FPL 2011: 219-224 - [c64]Masayuki Suzuki, Tsutomu Maruyama:
Variable and clause elimination in SAT problems using an FPGA. FPT 2011: 1-8 - [c63]Toyokazu Takagi, Tsutomu Maruyama:
Accelerating HMMER search using FPGA Grid. PARCO 2011: 587-594 - 2010
- [j8]Hajime Nobuhara, Dang Ba Khac Trieu, Tsutomu Maruyama, Barnabás Bede:
Max-plus algebra-based wavelet transforms and their FPGA implementation for image coding. Inf. Sci. 180(17): 3232-3247 (2010) - [j7]Kenji Kanazawa, Tsutomu Maruyama:
An Approach for Solving Large SAT Problems on FPGA. ACM Trans. Reconfigurable Technol. Syst. 4(1): 10:1-10:21 (2010) - [c62]Masayuki Suzuki, Yoshifumi Tanida, Tsutomu Maruyama:
Detecting Patterns in Various Size and Angle Using FPGA. FPL 2010: 151-154 - [c61]Kentaro Kokufuta, Tsutomu Maruyama:
Real-Time Processing of Contrast Limited Adaptive Histogram Equalization on FPGA. FPL 2010: 155-158 - [c60]Hiroaki Niitsuma, Tsutomu Maruyama:
Sum of Absolute Difference Implementations for Image Processing on FPGAs. FPL 2010: 167-170 - [c59]Jianyun Zhu, Tsutomu Maruyama:
Real-time detection of line segments on FPGA. FPT 2010: 192-199 - [c58]Shuichi Asano, Zheng Zhi Shun, Tsutomu Maruyama:
An FPGA implementation of full-search variable block size motion estimation. FPT 2010: 399-402
2000 – 2009
- 2009
- [c57]Shuichi Asano, Tsutomu Maruyama, Yoshiki Yamaguchi:
Performance comparison of FPGA, GPU and CPU in image processing. FPL 2009: 126-131 - [c56]Kentaro Kokufuta, Tsutomu Maruyama:
Real-time processing of local contrast enhancement on FPGA. FPL 2009: 288-293 - [c55]Toyokazu Takagi, Tsutomu Maruyama:
Accelerating HMMER search using FPGA. FPL 2009: 332-337 - 2008
- [c54]Takashi Saegusa, Tsutomu Maruyama, Yoshiki Yamaguchi:
How fast is an FPGA in image processing? FPL 2008: 77-82 - [c53]Dang Ba Khac Trieu, Tsutomu Maruyama:
An implementation of a watershed algorithm based on connected components on FPGA. FPT 2008: 253-256 - [c52]Yoshifumi Tanida, Tsutomu Maruyama:
An approach for downscaling images for real-time pattern detection. FPT 2008: 265-268 - 2007
- [j6]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
Multiple Sequence Alignment Based on Dynamic Programming Using FPGA. IEICE Trans. Inf. Syst. 90-D(12): 1939-1946 (2007) - [j5]Takashi Saegusa, Tsutomu Maruyama:
An FPGA implementation of real-time K-means clustering for color images. J. Real Time Image Process. 2(4): 309-318 (2007) - [j4]Dang Ba Khac Trieu, Tsutomu Maruyama:
Real-time image segmentation based on a parallel and pipelined watershed algorithm. J. Real Time Image Process. 2(4): 319-329 (2007) - [j3]Yoshiki Yamaguchi, Tsutomu Maruyama, Ryuzo Azuma, Moritoshi Yasunaga, Akihiko Konagaya:
Mesoscopic-level Simulation of Dynamics and Interactions of Biological Molecules Using Monte Carlo Simulation. J. VLSI Signal Process. 48(3): 287-299 (2007) - [c51]Yoshiki Yamaguchi, Kenji Kanazawa, Yoshiharu Ohke, Tsutomu Maruyama:
An Acceleration Method for Evolutionary Systems Based on Iterated Prisoner's Dilemma. ARC 2007: 358-364 - [c50]Yoshiki Yamaguchi, Tsutomu Maruyama, Fumikazu Konishi, Akihiko Konagaya:
High speed tablation system using an FPGA designed for distribution tables of frequent DNA subsequences. FPL 2007: 145-150 - [c49]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
An FPGA Implementation of Multiple Sequence Alignment Based on Carrillo-Lipman Method. FPL 2007: 489-492 - [c48]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for Very Large SAT Problems. FPL 2007: 493-496 - [c47]Dang Ba Khac Trieu, Tsutomu Maruyama:
A Pipeline Implementation of a Watershed Algorithm on FPGA. FPL 2007: 714-717 - [c46]Shingo Kawada, Tsutomu Maruyama:
An Approach for Applying Large Filters on Large Images using FPGA. FPT 2007: 201-208 - [c45]Takashi Saegusa, Tsutomu Maruyama:
Real-Time Segmentation of Color Images based on the K-means Clustering on FPGA. FPT 2007: 329-332 - [c44]Yusuke Arai, Ryo Sawai, Yoshiki Yamaguchi, Tsutomu Maruyama, Moritoshi Yasunaga:
A Lattice Gas Cellular Automata Simulator on the Cell Broadband Engine. PARCO 2007: 459-466 - 2006
- [c43]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
Multidimensional Dynamic Programming for Homology Search on Distributed Systems. Euro-Par 2006: 1127-1137 - [c42]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for Large SAT Problems. FPL 2006: 1-6 - [c41]Takashi Saegusa, Tsutomu Maruyama:
An FPGA Implementation of K-Means Clustering for Color Images Based on Kd-Tree. FPL 2006: 1-6 - [c40]Dang Ba Khac Trieu, Tsutomu Maruyama:
Implementation of a Parallel and Pipelined Watershed Algorithm on FPGA. FPL 2006: 1-6 - [c39]Tsutomu Maruyama:
Real-time K-Means Clustering for Color Images on Reconfigurable Hardware. ICPR (2) 2006: 816-819 - 2005
- [c38]Kenji Kanazawa, Tsutomu Maruyama:
An FPGA Solver for WSAT Algorithms. FPL 2005: 83-88 - [c37]Shingo Masuno, Tsutomu Maruyama, Yoshiki Yamaguchi, Akihiko Konagaya:
Multidimensional Dynamic Programming for Homology Search. FPL 2005: 173-178 - [c36]Hiroaki Niitsuma, Tsutomu Maruyama:
Real-time Generation of Three-Dimensional Motion Fields. FPL 2005: 179-184 - [c35]Yoshiki Yamaguchi, Tsutomu Maruyama, Ryuzo Azuma, Akihiko Konagaya:
Spatiotemporal Simulation of a Single Living Cell. FPT 2005: 267-274 - [c34]Nozomu Nagata, Tsutomu Maruyama:
A Compact System for Real-Time Detection of Line Segments. ICIAP 2005: 220-228 - [c33]Hiroaki Niitsuma, Tsutomu Maruyama:
High Speed Computation of the Optical Flow. ICIAP 2005: 287-295 - 2004
- [j2]Kenichi Tayama, Takashi Inoue, Tsutomu Maruyama, Hiroshi Uno:
An Operation Support System Architecture and Process for Optical Access Network Allocation during Service Provisioning. J. Netw. Syst. Manag. 12(3): 215-230 (2004) - [c32]Yoshiki Yamaguchi, Tsutomu Maruyama, Akihiko Konagaya:
Three-Dimensional Dynamic Programming for Homology Search. FPL 2004: 505-515 - [c31]Tsutomu Maruyama:
Real-Time Computation of the Generalized Hough Transform. FPL 2004: 980-985 - [c30]Hiroaki Niitsuma, Tsutomu Maruyama:
Real-Time Detection of Moving Objects. FPL 2004: 1155-1157 - [c29]Nozomu Nagata, Tsutomu Maruyama:
Real-time detection of line segments using the line Hough transform. FPT 2004: 89-96 - [c28]Yohei Hori, Tsutomu Maruyama, Kenji Toda:
A tsume-shogi processor based on reconfigurable hardware. FPT 2004: 347-350 - 2003
- [c27]Toshihito Fujiwara, Kenji Fujimoto, Tsutomu Maruyama:
A Real-Time Visualization System for PIV. FPL 2003: 437-447 - [c26]Yosuke Miyajima, Tsutomu Maruyama:
A Real-Time Stereo Vision System with FPGA. FPL 2003: 448-457 - [c25]Tomoyoshi Kobori, Tsutomu Maruyama:
A High Speed Computation System for 3D FCHC Lattice Gas Model with FPGA. FPL 2003: 755-765 - 2002
- [c24]Yoshiki Yamaguchi, Yosuke Miyajima, Tsutomu Maruyama, Akihiko Konagaya:
High Speed Homology Search Using Run-Time Reconfiguration. FPL 2002: 281-291 - [c23]Tomoyoshi Kobori, Tsutomu Maruyama:
High Speed Computation of Three Dimensional Cellular Automata with FPGA. FPL 2002: 1126-1130 - [c22]Akira Miyashita, Toshihito Fujiwara, Tsutomu Maruyama:
A Placement/Routing Approach for FPGA Accelerators. FPL 2002: 1177-1182 - [c21]Yohei Hori, Masashi Sonoyama, Tsutomu Maruyama:
An FPGA-based processor for shogi mating problems. FPT 2002: 117-124 - [c20]Kenichi Tayama, Tsutomu Maruyama, Hiroshi Uno, Takashi Inoue:
An operation support system architecture for network provisioning of optical access networks. NOMS 2002: 829-842 - [c19]Yoshiki Yamaguchi, Tsutomu Maruyama, Akihiko Konagaya:
High Speed Homology Search with FPGAs. Pacific Symposium on Biocomputing 2002: 271-282 - 2001
- [c18]Tomoyoshi Kobori, Tsutomu Maruyama, Tsutomu Hoshino:
A Cellular Automata System with FPGA. FCCM 2001: 120-129 - [c17]Tsutomu Maruyama:
An Approach for Automatic Data Allocation in C to HDL Compilers. FCCM 2001: 255-256 - [c16]Takashi Saito, Tsutomu Maruyama, Tsutomu Hoshino, Saburo Hirano:
A Music Synthesizer on FPGA. FPL 2001: 377-387 - [c15]Tsutomu Maruyama, Yoshiki Yamaguchi, Atsushi Kawase:
An Approach to Real-Time Visualization of PIV Method with FPGA. FPL 2001: 601-606 - 2000
- [c14]Yohei Hori, Minenobu Seki, Reijer Grimbergen, Tsutomu Maruyama, Tsutomu Hoshino:
A Shogi Processor with a Field Programmable Gate Array. Computers and Games 2000: 297-314 - [c13]Tsutomu Maruyama, Tsutomu Hoshino:
A C to HDL Compiler for Pipeline Processing on FPGAs. FCCM 2000: 101-112 - [c12]Yoshiki Yamaguchi, Akira Miyashita, Tsutomu Maruyama, Tsutomu Hoshino:
A Co-processor System with a Virtex FPGA for Evolutionary Computation. FPL 2000: 240-249 - [c11]Tomoyoshi Kobori, Tsutomu Maruyama, Tsutomu Hoshino:
High Speed Computation of Lattice gas Automata with FPFA. FPL 2000: 801-804
1990 – 1999
- 1999
- [c10]Yoshiki Yamaguchi, Tsutomu Maruyama, Tsutomu Hoshino:
High Speed Hardware Computation of Co-evolution Models. ECAL 1999: 566-574 - [c9]Tsutomu Maruyama, Masaaki Takagi, Tsutomu Hoshino:
Hardware Implementation Techniques for Recursive Calls and Loops. FPL 1999: 450-455 - [c8]Tsutomu Maruyama, Tsutomu Hoshino:
A Reconfigurable Architecture for High Speed Computation by Pipeline Processing. FPL 1999: 514-519 - 1998
- [c7]Tsutomu Maruyama, Terunobu Funatsu, Tsutomu Hoshino:
A Field-Programmable Gate-Array System for Evolutionary Computation. FPL 1998: 356-365 - 1995
- [j1]Tsutomu Maruyama, Yasushi Kanoh, Tetsuya Hirose, Kazuhiro Muramatsu, Toshiyuki Nakata, Yoshihiro Asano, Yu Inamura:
Architecture of a parallel machine: Cenju-3. Syst. Comput. Jpn. 26(14): 26-36 (1995) - 1993
- [c6]Tsutomu Maruyama, Tetsuya Hirose, Akihiko Konagaya:
A Fine-Grained Parallel Genetic Algorithm for Distributed Parallel Systems. ICGA 1993: 184-190 - 1992
- [c5]Koichi Konishi, Tsutomu Maruyama, Akihiko Konagaya, Kaoru Yoshida, Takashi Chikayama:
Implementing Streams on Parallel Machines with Distributed Memory. FGCS 1992: 791-798 - [c4]Tsutomu Maruyama, Akihiko Konagaya, Koichi Konishi:
An Asynchronous Fine-Grained Parallel Genetic Algorithm. PPSN 1992: 569-578
1980 – 1989
- 1987
- [c3]Toshiaki Tarui, Tsutomu Maruyama, Hidehiko Tanaka:
A Preliminary Evaluation of a Parallel Inference Machine for Stream Parallel Languages. LP 1987: 132-147 - 1985
- [c2]Tsutomu Maruyama, Keiji Hirata, Hidehiko Tanaka, Tohru Moto-Oka:
A Note on the Elementary Execution Unit in a Parallel Inference Machine. LP 1985: 25-34 - 1984
- [c1]Tohru Moto-Oka, Hidehiko Tanaka, Hitoshi Aida, Keiji Hirata, Tsutomu Maruyama:
The Architecture of a Parallel Inference Engine - PIE. FGCS 1984: 479-488
Coauthor Index
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