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ORCIDVikram Saxena
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2010 – 2019
- 2013
[c6]Chitralekha Bhat, Imran Ahmed, Vikram Saxena, Sunil Kumar Kopparapu:
Visual Subtitles for Internet Videos. SLPAT 2013: 17-20- [c5]Vikram Saxena, Sunil Kumar Kopparapu:
An Optimization Approach to Identify the Best Sell Market. UKSim 2013: 177-181
2000 – 2009
- 2004
- [j3]Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, Robert Anderson, Juan Ramon Uribe:
Overview of a compiler for synthesizing MATLAB programs onto FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 12(3): 312-324 (2004) - 2003
- [c4]Prithviraj Banerjee, Vikram Saxena, Juan Ramon Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, Robert Anderson:
Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. FPGA 2003: 237 - 2002
- [j2]Vikram Saxena, Farid N. Najm, Ibrahim N. Hajj:
Estimation of state line statistics in sequential circuits. ACM Trans. Design Autom. Electr. Syst. 7(3): 455-473 (2002)
1990 – 1999
- 1997
- [c3]Vikram Saxena, Farid N. Najm, Ibrahim N. Hajj:
Monte-Carlo approach for power estimation in sequential circuits. ED&TC 1997: 416-420 - [c2]Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee:
Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. VLSI Design 1997: 475-481 - 1996
- [j1]C. P. Ravikumar, Vikram Saxena:
TOGAPS: A Testability Oriented Genetic Algorithm For Pipeline Synthesis. VLSI Design 5(1): 77-87 (1996) - [c1]C. P. Ravikumar, Vikram Saxena:
Synthesis of Testable Pipelined Datapaths Using Genetic Search. VLSI Design 1996: 205-210
Coauthor Index
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