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Masahiro Kainaga

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2000 – 2009

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2006
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Toru Shimizu, Masami Nakajima, Masahiro Kainaga:
Design and Evaluation of a Massively Parallel Processor Based on Matrix Architecture. IEICE Trans. Electron. 89-C(11): 1512-1518 (2006)

1990 – 1999

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1995
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Hiroshi Ohta, Yasuhiko Saito, Masahiro Kainaga, Hiroyuki Ono:
Optimal Tile Size Adjustment in Compiling General DOACROSS Loop Nests. International Conference on Supercomputing 1995: 270-279
1994
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Tetsuhiko Okada, Susumu Narita, Osamu Nishii, Noriharu Hiratsuka, Nobuyuki Hayashi, Mitsuo Asai, Shinji Fujiwara, Mikiko Satoh, Junichi Nishimoto, Hirokazu Aoki, Kunio Uchiyama, Shigeru Matsuo, Hidehito Takewa, Kouji Yamada, Masahiro Kainaga, Norio Nakagawa, Masanobu Yamagami, Hiroshi Takeda, Tsuneo Funabashi:
A PA-RISC Mikroprocessor PA/50L For Low-Cost Systems. COMPCON 1994: 47-52

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