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Daniel Mozos
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2020 – today
- 2024
- [j37]Borja Morcillo, Daniel Báscones, Carlos González, José M. Mendías, Daniel Mozos:
Parametric Pipelined k-Means Implementation for Hyperspectral Processing on Spacecraft Embedded FPGA. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 17: 15927-15941 (2024) - [j36]Pedro Palacios, Daniel Báscones, Carlos González, Daniel Mozos:
A Real-Time FPGA Implementation of the LCMV Algorithm for Target Classification in Hyperspectral Images Using LDL Decomposition. IEEE Trans. Geosci. Remote. Sens. 62: 1-14 (2024) - 2023
- [c33]Daniel Fernandez, Carlos González, Daniel Mozos:
Real-Time Independent Components Analysis for Dimensional Reduction of Hyperspectral Images Using Reconfigurable Hardware. DSD 2023: 515-522 - 2022
- [j35]Daniel Báscones, Carlos González, Daniel Mozos:
A Real-Time FPGA Implementation of the CCSDS 123.0-B-2 Standard. IEEE Trans. Geosci. Remote. Sens. 60: 1-13 (2022) - 2020
- [j34]Daniel Báscones, Carlos González, Daniel Mozos:
An FPGA Accelerator for Real-Time Lossy Compression of Hyperspectral Images. Remote. Sens. 12(16): 2563 (2020) - [j33]Daniel Báscones, Carlos González, Daniel Mozos:
An Extremely Pipelined FPGA Implementation of a Lossy Hyperspectral Image Compression Algorithm. IEEE Trans. Geosci. Remote. Sens. 58(10): 7435-7447 (2020)
2010 – 2019
- 2019
- [j32]Daniel Fernandez, Carlos González, Daniel Mozos, Sebastián López:
FPGA implementation of the principal component analysis algorithm for dimensionality reduction of hyperspectral images. J. Real Time Image Process. 16(5): 1395-1406 (2019) - [j31]Germán León, Carlos González, Rafael Mayo, Daniel Mozos, Enrique S. Quintana-Ortí:
Noise estimation for hyperspectral subspace identification on FPGAs. J. Supercomput. 75(3): 1323-1335 (2019) - 2018
- [j30]Carlos González, Sebastián López, Daniel Mozos, Roberto Sarmiento:
A novel FPGA-based architecture for the estimation of the virtual dimensionality in remotely sensed hyperspectral images. J. Real Time Image Process. 15(2): 297-308 (2018) - [j29]Daniel Báscones, Carlos González, Daniel Mozos:
Hyperspectral Image Compression Using Vector Quantization, PCA and JPEG2000. Remote. Sens. 10(6): 907 (2018) - [j28]Daniel Báscones, Carlos González, Daniel Mozos:
FPGA Implementation of the CCSDS 1.2.3 Standard for Real-Time Hyperspectral Lossless Compression. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 11(4): 1158-1165 (2018) - 2017
- [j27]Daniel Báscones, Carlos González, Daniel Mozos:
Parallel Implementation of the CCSDS 1.2.3 Standard for Hyperspectral Lossless Compression. Remote. Sens. 9(10): 973 (2017) - 2016
- [j26]Carlos González, Sergio Bernabé, Daniel Mozos, Antonio Plaza:
FPGA Implementation of an Algorithm for Automatically Detecting Targets in Remotely Sensed Hyperspectral Images. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 9(9): 4334-4343 (2016) - [c32]Daniel Fenzandez, Carlos González, Daniel Mozos:
Dimensionality reduction of hyperspectral images using reconfigurable hardware. FPL 2016: 1-2 - 2015
- [j25]Carlos González, Sebastián López, Daniel Mozos, Roberto Sarmiento:
FPGA Implementation of the HySime Algorithm for the Determination of the Number of Endmembers in Hyperspectral Data. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 8(6): 2870-2883 (2015) - [c31]Carlos González, Daniel Mozos, Sebastián López, Roberto Sarmiento:
FPGA implementation to estimate the number of endmembers in hyperspectral images. FPL 2015: 1-8 - 2014
- [j24]Ginés D. Guerrero, Richard M. Wallace, José Luis Vázquez-Poletti, José M. Cecilia, José M. García, Daniel Mozos, Horacio Emilio Pérez Sánchez:
A performance/cost model for a CUDA drug discovery application on physical and public cloud infrastructures. Concurr. Comput. Pract. Exp. 26(10): 1787-1798 (2014) - [j23]Juan Antonio Clemente, Javier Resano, Daniel Mozos:
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems. ACM Trans. Embed. Comput. Syst. 13(4): 90:1-90:24 (2014) - [j22]Juan Antonio Clemente, Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1248-1261 (2014) - 2013
- [j21]Carlos González, Sergio Sánchez, Abel Paz, Javier Resano, Daniel Mozos, Antonio Plaza:
Use of FPGA or GPU-based architectures for remotely sensed hyperspectral image processing. Integr. 46(2): 89-103 (2013) - [j20]Sebastián López, Tanya Vladimirova, Carlos González, Javier Resano, Daniel Mozos, Antonio Plaza:
The Promise of Reconfigurable Computing for Hyperspectral Imaging Onboard Systems: A Review and Trends. Proc. IEEE 101(3): 698-722 (2013) - 2012
- [j19]Carlos González, Javier Resano, Antonio Plaza, Daniel Mozos:
FPGA Implementation of Abundance Estimation for Spectral Unmixing of Hyperspectral Data Using the Image Space Reconstruction Algorithm. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 5(1): 248-261 (2012) - [j18]Carlos González, Daniel Mozos, Javier Resano, Antonio Plaza:
FPGA Implementation of the N-FINDR Algorithm for Remotely Sensed Hyperspectral Image Analysis. IEEE Trans. Geosci. Remote. Sens. 50(2): 374-388 (2012) - 2011
- [j17]Juan Antonio Clemente, Javier Resano, Carlos González, Daniel Mozos:
A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 19(7): 1263-1276 (2011) - [c30]Juan Antonio Clemente, Daniel Mozos, Javier Resano:
A Replacement Technique to Maximize Task Reuse in Reconfigurable Systems. IPDPS Workshops 2011: 250-257 - 2010
- [j16]Carlos González, Javier Resano, Daniel Mozos, Antonio Plaza, David Valencia:
FPGA Implementation of the Pixel Purity Index Algorithm for Remotely Sensed Hyperspectral Image Analysis. EURASIP J. Adv. Signal Process. 2010 (2010) - [j15]Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos:
A task graph execution manager for reconfigurable multi-tasking systems. Microprocess. Microsystems 34(2-4): 73-83 (2010) - [c29]Sara Román Navarro, Hortensia Mecha, Daniel Mozos:
A Constant Complexity Allocation Algorithm for Reconfigurable Systems Management Adapted to Heterogeneous Workload Profiles. ERSA 2010: 259-262 - [c28]Carlos González, Daniel Mozos, Javier Resano, Antonio Plaza:
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images. ERSA 2010: 293-
2000 – 2009
- 2009
- [c27]Carlos González, Daniel Mozos, Javier Resano:
FPGA support for satellite computations of hyper spectral images. FPL 2009: 715-716 - [c26]Jose Antonio Valero, Julio Septién, Daniel Mozos, Hortensia Mecha:
3D FPGA resource management and fragmentation metric for hardware multitasking. IPDPS 2009: 1-7 - 2008
- [j14]S. Roman, Hortensia Mecha, Daniel Mozos, Julio Septién:
Constant complexity scheduling for hardware multitasking in two dimensional reconfigurable field-programmable gate arrays. IET Comput. Digit. Tech. 2(6): 401-412 (2008) - [j13]Jesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos:
Allocation heuristics and defragmentation measures for reconfigurable systems management. Integr. 41(2): 281-296 (2008) - [j12]Javier Resano, Juan Antonio Clemente, Carlos González, Daniel Mozos, Francky Catthoor:
Efficiently scheduling runtime reconfigurations. ACM Trans. Design Autom. Electr. Syst. 13(4): 58:1-58:12 (2008) - [c25]Angel Luis González Bravo, Hortensia Mecha, Julio Septién, Sara Román Navarro, Daniel Mozos:
Synthesis of relocatable tasks and implementation of a task communication bus in a general purpose Hw system. ERSA 2008: 307-308 - [c24]Laura Sánchez, Julio Septién, Daniel Mozos, Hortensia Mecha, Angel Luis González Bravo:
FPGA Resource Management Using Internal RAM as Aata Cache. ERSA 2008: 317-318 - [c23]Jose Antonio Valero, Julio Septién, Daniel Mozos, Hortensia Mecha, Angel Luis González Bravo:
Resource Management for Hw Multitasking in Three Dimensional FPGAs. ERSA 2008: 319-320 - [c22]Jesús Fernández-Conde, Daniel Mozos:
Pull vs. Hybrid: Comparing Scheduling Algorithms for Asymmetric Time-Constrained Environments. ICWN 2008: 222-228 - [c21]Julio Septién, Daniel Mozos, Hortensia Mecha, Jesús Tabero, Miguel Angel García de Dios:
Perimeter quadrature-based metric for estimating FPGA fragmentation in 2D HW multitasking. IPDPS 2008: 1-8 - [c20]Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos:
A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems. ReConFig 2008: 79-84 - 2007
- [j11]Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
Memory hierarchy for high-performance and energyaware reconfigurable systems. IET Comput. Digit. Tech. 1(5): 565-571 (2007) - [c19]Javier Resano, Juan Antonio Clemente, Carlos González, Jose Luis Garcia, Daniel Mozos:
HW implementation of an execution manager for reconfigurable systems. ERSA 2007: 71-77 - [c18]Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
Reducing the reconfiguration overhead: a survey of techniques. ERSA 2007: 191-194 - [i1]Javier Resano, Daniel Mozos, Francky Catthoor:
A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware. CoRR abs/0710.4796 (2007) - 2006
- [c17]Sara Román Navarro, Julio Septién, Hortensia Mecha, Daniel Mozos:
Constant Complexity Management of 2D HW Multitasking in Run-Time Reconfigurable FPGAs. ARC 2006: 187-192 - [c16]Jesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos:
Task placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems. ASP-DAC 2006: 396-401 - [c15]Sara Román Navarro, Hortensia Mecha, Daniel Mozos, Julio Septién:
Partition Based Dynamic 2D HW Multitasking Management. DSD 2006: 61-70 - [c14]Jesús Fernández-Conde, Daniel Mozos:
Adaptive Hybrid Broadcast for Data Dissemination in Time-Constrained Asymmetric Communication Environments. EUROMICRO-SEAA 2006: 438-447 - [c13]Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead. IPDPS 2006 - [c12]Julio Septién, Hortensia Mecha, Daniel Mozos, Jesús Tabero:
2D defragmentation heuristics for hardware multitasking on reconfigurable devices. IPDPS 2006 - 2005
- [j10]Javier Resano, Daniel Mozos, Diederik Verkest, Francky Catthoor:
A Reconfiguration Manager for Dynamically Reconfigurable Hardware. IEEE Des. Test Comput. 22(5): 452-460 (2005) - [c11]Javier Resano, Daniel Mozos, Francky Catthoor:
A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware. DATE 2005: 106-111 - 2004
- [j9]Juan Antonio Maestro, Daniel Mozos, Raquel Dormido, Pedro Reviriego:
New Alternatives to the Estimation Problem in Hardware-Software Codesign of Complex Embedded Systems: The H.261 Video Co-dec Case Study. Des. Autom. Embed. Syst. 9(3): 193-210 (2004) - [j8]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs. Microprocess. Microsystems 28(5-6): 291-301 (2004) - [c10]Javier Resano, Daniel Mozos:
Specific scheduling support to minimize the reconfiguration overhead of dynamically reconfigurable hardware. DAC 2004: 119-124 - [c9]Jesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos:
A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management. FPL 2004: 241-250 - 2003
- [j7]Javier Resano, M. Elena Pérez, Daniel Mozos, Hortensia Mecha, Julio Septién:
Analyzing communication overheads during hardware/software partitioning. Microelectron. J. 34(11): 1001-1007 (2003) - [c8]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems. ESTIMedia 2003: 156-162 - [c7]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. FCCM 2003: 278-279 - [c6]Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor:
Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. FPL 2003: 585-594 - [c5]Javier Resano, Daniel Mozos, Elena Pérez-Miñana, Hortensia Mecha, Julio Septién:
A Hardware/Software Partitioning and Scheduling Approach for Embedded Systems with Low-Power and High Performance Requirements. PATMOS 2003: 580-589
1990 – 1999
- 1999
- [c4]Juan Antonio Maestro, Daniel Mozos, Román Hermida:
The Heterogeneous Structure Problem in Hardware/Software Codesign: A Macroscopic Approach. DATE 1999: 766-767 - 1998
- [c3]Juan Antonio Maestro, Daniel Mozos, Hortensia Mecha:
A Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process. DATE 1998: 218-225 - [c2]Juan Antonio Maestro, Daniel Mozos, Julio Septién:
A Grouping Partitioning Technique with Automatic Criterion Selection for the Codesign Proces. EUROMICRO 1998: 10309-10312 - 1994
- [j6]Hortensia Mecha, Milagros Fernández, Román Hermida, Daniel Mozos, Katzalin Olcoz:
Clock cycle estimation based on dead time and control unit area minimization. Microprocess. Microprogramming 40(10-12): 821-824 (1994) - 1993
- [j5]Daniel Mozos, Julio Septién, Francisco Tirado, Milagros Fernández:
Guidance for optimization-based synthesis tools. Microprocess. Microprogramming 37(1-5): 95-98 (1993) - [j4]R. Moreno, Román Hermida, Daniel Mozos, Katzalin Olcoz:
Global hardware synthesis guided by realistic probability computation. Microprocess. Microprogramming 39(2-5): 233-236 (1993) - [j3]Katzalin Olcoz, Francisco Tirado, Daniel Mozos, Julio Septién, R. Moreno:
Data path structures and heuristics for testable allocation in high level synthesis. Microprocess. Microprogramming 39(2-5): 263-266 (1993) - 1992
- [j2]Daniel Mozos, Julio Septién, Francisco Tirado, Román Hermida:
Design control in a high level synthesis system. Microprocess. Microprogramming 34(1-5): 93-96 (1992) - [c1]Julio Septién, Daniel Mozos, Francisco Tirado, Román Hermida, Milagros Fernández:
Heuristics for branch-and-bound global allocation. EURO-DAC 1992: 334-340 - 1991
- [j1]J. Septiéna, Daniel Mozos, Román Hermida, Francisco Tirado:
A hardware allocator guided by cost functions. Microprocessing and Microprogramming 32(1-5): 185-192 (1991)
Coauthor Index
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last updated on 2024-10-04 20:05 CEST by the dblp team
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