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ORCIDElena Gramatová
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2010 – 2019
- 2016
[c16]Róbert Tamási, Miroslav Siebert, Elena Gramatová, Petr Fiser:
A new method for path criticality calculation. DDECS 2016: 190-193- [c15]Marek Lipovský, Ján Svarc, Elena Gramatová, Petr Fiser:
A new user-friendly ATPG platform for digital circuits. DDECS 2016: 210-213 - 2015
- [c14]Miroslav Siebert, Elena Gramatová:
Parameterized Critical Path Selection for Delay Fault Testing. DDECS 2015: 153-156 - 2013
- [c13]Stefan Kristofík
, Elena Gramatová:
Redundancy algorithm for embedded memories with block-based architecture. DDECS 2013: 271-274 - [c12]Miroslav Siebert, Elena Gramatová:
Delay Fault Coverage Increasing in Digital Circuits. DSD 2013: 475-478 - 2012
- [c11]Matej Hlatký, Valter Martinek, Elena Gramatová:
D&T Presenter - electronic interactive system for design and test education. DDECS 2012: 175-178 - 2011
- [j3]Roland Dobai, Elena Gramatová:
A novel automatic test pattern generator for asynchronous sequential digital circuits. Microelectron. J. 42(3): 501-508 (2011) - [c10]Miroslav Manik, Elena Gramatová:
Efficient diagnostics algorithms for regular computing structures. DDECS 2011: 87-92 - 2010
- [j2]Roland Dobai, Elena Gramatová:
Deductive Fault Simulation Technique for Asynchronous Circuits. Comput. Informatics 29(6): 1025-1043 (2010) - [c9]Roland Dobai, Elena Gramatová:
Test pattern generation for the combinational representation of asynchronous circuits. DDECS 2010: 323-328 - [e2]Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann:
13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010. IEEE Computer Society 2010, ISBN 978-1-4244-6612-2 [contents]
2000 – 2009
- 2009
- [c8]Miroslav Manik, Elena Gramatová:
Diagnosis of faulty units in regular graphs under the PMC model. DDECS 2009: 202-205 - [c7]Roland Dobai, Elena Gramatová:
Deductive Fault Simulation for Asynchronous Sequential Circuits. DSD 2009: 459-464 - 2008
- [c6]Miroslav Manik, Elena Gramatová:
Boolean Formalisation of the PMC Model for Faulty Units Diagnosis in Regular Multi-Processor Systems. DDECS 2008: 144-145 - 2007
- [e1]Patrick Girard, Andrzej Krasniewski, Elena Gramatová, Adam Pawlak, Tomasz Garbolino:
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007. IEEE Computer Society 2007, ISBN 1-4244-1161-0 [contents] - 2002
- [j1]T. Cibáková, Mária Fischerová, Elena Gramatová, Wieslaw Kuzmicz, Witold A. Pleskacz, Jaan Raik, Raimund Ubar:
Hierarchical test generation for combinational circuits with real defects coverage. Microelectron. Reliab. 42(7): 1141-1149 (2002) - [c5]André Schneider, Karl-Heinz Diener, Eero Ivask, Jaan Raik, Raimund Ubar, P. Miklos, T. Cibáková, Elena Gramatová:
Internet-Based Collaborative Test Generation with MOSCITO. DATE 2002: 221-226 - [c4]André Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatová, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng:
Integrated Design and Test Generation Under Internet Based Environment MOSCITO. DSD 2002: 187-195 - 2000
- [c3]Mykola Blyzniuk, T. Cibáková, Elena Gramatová, Wieslaw Kuzmicz, M. Lobur, Witold A. Pleskacz, Jaan Raik, Raimund Ubar:
Hierarchical defect-oriented fault simulation for digital circuits. ETW 2000: 69-74
1990 – 1999
- 1994
- [c2]P. Gramata, P. Trebaticky, Elena Gramatová:
The MD5 Message-Digest Algorithm in the XILINX FPGA. FPL 1994: 126-128 - 1993
- [c1]Andrej Magdolen, Jana Bezakova, Elena Gramatová, Mária Fischerová:
REGGEN-Test pattern generation on register transfer level. EURO-DAC 1993: 259-264
Coauthor Index
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