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Lauri Koskinen
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2020 – today
- 2024
- [i1]Mikael Rinkinen, Lauri Koskinen, Olli Silvén, Mehdi Safarpour:
Shavette: Low Power Neural Network Acceleration via Algorithm-level Error Detection and Undervolting. CoRR abs/2410.13415 (2024) - 2021
- [j10]Ruzica Jevtic, Marko Ylitolva, Clara Calonge, Martti Ojanen, Tero Säntti, Lauri Koskinen:
EM Side-Channel Countermeasure for Switched-Capacitor DC-DC Converters Based on Amplitude Modulation. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1061-1072 (2021) - 2020
- [c23]Sofia Mäkikyrö, Samuli Tuoriniemi, Risto Anttila, Lauri Koskinen:
Execution Frequency and Energy Optimization for DVFS-enabled, Near-threshold Processors. ACIT 2020: 518-522 - [c22]Markus Hiienkari, Navneet Gupta, Jukka Teittinen, Jesse Simonsson, Matthew J. Turnquist, Jonas Eriksson, Risto Anttila, Ohto Myllynen, Hannu Rämäkkö, Sofia Mäkikyrö, Lauri Koskinen:
A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan. COOL CHIPS 2020: 1-3
2010 – 2019
- 2018
- [c21]Ruzica Jevtic, Marko Ylitolva, Lauri Koskinen:
Reconfigurable Switched Capacitor DC-DC Converter for Improved Security in IoT Devices. PATMOS 2018: 243-247 - 2017
- [j9]Jukka Teittinen, Markus Hiienkari, Indre Zliobaite, Jaakko Hollmén, Heikki Berg, Juha Heiskala, Timo Viitanen, Jesse Simonsson, Lauri Koskinen:
A 5.3 pJ/op approximate TTA VLIW tailored for machine learning. Microelectron. J. 61: 106-113 (2017) - 2016
- [j8]Lauri Koskinen, Markus Hiienkari, Jani Mäkipää, Matthew J. Turnquist:
Implementing Minimum-Energy-Point Systems With Adaptive Logic. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1247-1256 (2016) - [c20]Lauri Koskinen, Jari Tissari, Jukka Teittinen, Eero Lehtonen, Mika Laiho, Jussi H. Poikonen:
A Performance Case-Study on Memristive Computing-in-Memory Versus Von Neumann Architecture. DCC 2016: 613 - 2015
- [j7]Eero Lehtonen, Jussi H. Poikonen, Jari Tissari, Mika Laiho, Lauri Koskinen:
Recursive Algorithms in Memristive Logic Arrays. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(2): 279-292 (2015) - [c19]Matthew J. Turnquist, Markus Hiienkari, Jani Mäkipää, Lauri Koskinen:
A fully integrated self-oscillating switched-capacitor DC-DC converter for near-threshold loads. A-SSCC 2015: 1-4 - [c18]Joonas Multanen, Timo Viitanen, Henry Linjamaki, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Lauri Koskinen, Jesse Simonsson, Heikki Berg, Kalle Raiskila, Tommi Zetterman:
Power optimizations for transport triggered SIMD processors. SAMOS 2015: 303-309 - [c17]Matthew J. Turnquist, Markus Hiienkari, Jani Mäkipää, Ruzica Jevtic, Elina Pohjalainen, Tanja Kallio, Lauri Koskinen:
Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery. VLSIC 2015: 320- - 2014
- [j6]Eero Lehtonen, Jari Tissari, Jussi H. Poikonen, Mika Laiho, Lauri Koskinen:
A cellular computing architecture for parallel memristive stateful logic. Microelectron. J. 45(11): 1438-1449 (2014) - [j5]Indre Zliobaite, Jaakko Hollmén, Lauri Koskinen, Jukka Teittinen:
Towards Hardware-driven Design of Low-energy Algorithms for Data Analysis. SIGMOD Rec. 43(4): 15-20 (2014) - [c16]Markus Hiienkari, Jukka Teittinen, Lauri Koskinen, Matthew J. Turnquist, Mikko Kaltiokallio:
A 3.15pJ/cyc 32-bit RISC CPU with timing-error prevention and adaptive clocking in 28nm CMOS. CICC 2014: 1-4 - 2013
- [c15]Lauri Koskinen, Enrico Roverato:
Hardware requirements of communication-centric machine learning algorithms. AHS 2013: 138-143 - [c14]Matthew J. Turnquist, Jani Mäkipää, Markus Hiienkari, Hanh-Phuc Le, Lauri Koskinen:
Rethinking DC-DC converter design constraints for adaptable systems that target the minimum-energy point. ISLPED 2013: 383-388 - 2012
- [c13]Erkka Laulainen, Matthew J. Turnquist, Jani Mäkipää, Lauri Koskinen:
Adaptive subthreshold timing-error detection 8 bit microcontroller in 65 nm CMOS. ISCAS 2012: 2953-2956 - 2011
- [c12]Matthew J. Turnquist, Erkka Laulainen, Jani Mäkipää, Lauri Koskinen:
Measurement of a system-adaptive error-detection sequential circuit with subthreshold SCL. NORCHIP 2011: 1-4 - 2010
- [c11]Lauri Koskinen, Jonne Poikonen, Mika Laiho, Ari Paasio:
Rate-distortion performance analysis of an analog motion estimation array. ICASSP 2010: 1530-1533
2000 – 2009
- 2009
- [j4]Jonne Poikonen, Mika Laiho, Ari Paasio, Lauri Koskinen, Kari Halonen:
An Analog Processor Array Implementing Interconnect-Efficient Reference Data Shift and SAD/SSD Extraction for Motion Estimation. EURASIP J. Adv. Signal Process. 2009 (2009) - [j3]Matti Paavola, Mika Kämäräinen, Erkka Laulainen, Mikko Saukoski, Lauri Koskinen, Marko Kosunen, Kari A. I. Halonen:
A Micropower ΔΣ-Based Interface ASIC for a Capacitive 3-Axis Micro-Accelerometer. IEEE J. Solid State Circuits 44(11): 3193-3210 (2009) - [c10]Matthew J. Turnquist, Erkka Laulainen, Jani Mäkipää, Hannu Tenhunen, Lauri Koskinen:
Adaptive Sub-Threshold Test Circuit. AHS 2009: 197-203 - [c9]Liang Guang, Ethiopia Nigussie, Lauri Koskinen, Hannu Tenhunen:
Autonomous DVFS on Supply Islands for Energy-Constrained NoC Communication. ARCS 2009: 183-194 - 2008
- [c8]Erkka Laulainen, Lauri Koskinen, Marko Kosunen, Kari Halonen:
Compass tilt compensation algorithm using CORDIC. ISCAS 2008: 1188-1191 - [c7]Mika Kämäräinen, Matti Paavola, Mikko Saukoski, Erkka Laulainen, Lauri Koskinen, Marko Kosunen, Kari Halonen:
A 1.5μW 1V 2nd-Order ΔΣ Sensor Front-End with Signal Boosting and Offset Compensation for a Capacitive 3-Axis Micro-Accelerometer. ISSCC 2008: 578-579 - 2007
- [j2]Lauri Koskinen, Ari Paasio, Kari Halonen:
CNN-type algorithms for H.264 variable block-size partitioning. Signal Process. Image Commun. 22(9): 797-808 (2007) - [c6]Lauri Koskinen, Joona Marku, Ari Paasio, Kari Halonen:
Architecture for Analog Variable Block-Size Motion Estimation. ICIP (2) 2007: 493-496 - 2005
- [j1]Lauri Koskinen, Ari Paasio, Kari Halonen:
Motion estimation computational complexity reduction with CNN shape segmentation. IEEE Trans. Circuits Syst. Video Technol. 15(6): 771-777 (2005) - [c5]Lauri Koskinen, Kari Halonen, Ari Paasio:
Parallel processor algorithm for variable block-size computation at low bitrates [video coding applications]. ISCAS (4) 2005: 4122-4125 - [c4]Saku Hamalainen, Lauri Koskinen, Kari Halonen:
A hardware-based predictive motion estimation algorithm. ISCAS (6) 2005: 6114-6117 - 2004
- [c3]Lauri Koskinen, Ari Paasio, Kari Halonen:
3-neighborhood motion estimation in CNN silicon architectures. ISCAS (5) 2004: 708-711 - 2003
- [c2]Lauri Koskinen, Ari Paasio, Kari Halonen:
CNN shape segmentation advantages in MPEG-4 simple profile encoding. ISSPA (2) 2003: 117-120 - 2002
- [c1]Lauri Koskinen, Ari Paasio, Mika Laiho, Kari Halonen:
Effect of CNN shape segmentation on MPEG-4 shape bit-rate. ISCAS (4) 2002: 552-555
Coauthor Index
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last updated on 2024-11-25 22:46 CET by the dblp team
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