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2020 – today
- 2024
[j25]Mario Barbareschi
, Valentina Casola, Antonio Emmanuele, Daniele Lombardi:
A Lightweight PUF-Based Protocol for Dynamic and Secure Group Key Management in IoT. IEEE Internet Things J. 11(20): 32969-32984 (2024)- [j24]Mario Barbareschi, Salvatore Barone, Nicola Mazzocca, Alberto Moriconi:
FPGA approximate logic synthesis through catalog-based AIG-rewriting technique. J. Syst. Archit. 150: 103112 (2024) - [c54]Daniele Lombardi, Mario Barbareschi, Salvatore Barone, Valentina Casola:
A comprehensive evaluation of interrupt measurement techniques for predictability in safety-critical systems. ARES 2024: 172:1-172:10 - [c53]Mario Barbareschi, Valentina Casola, Antonio Emmanuele, Daniele Lombardi:
On the adoption of PUF for key agreement scheme in Internet of Things. CF (Companion) 2024 - [c52]Mario Barbareschi, Franco Cirillo, Christian Esposito:
SRAM-PUF Authentication Schemes Empowered with Blockchain on Resource-Constrained Microcontrollers. ISORC 2024: 1-10 - [c51]Mario Barbareschi, Biagio Boi, Franco Cirillo, Marco De Santis, Christian Esposito:
Securing the Internet of Medical Things using PUF-based SSI Authentication. ITASEC 2024 - 2023
- [j23]Alberto Bosio, Mario Barbareschi, Alessandro Savino, Jie Han, Jürgen Teich:
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems. IEEE Des. Test 40(3): 5-7 (2023) - [j22]Arturo Amendola, Mario Barbareschi, Salvatore De Simone, Giovanni Mezzina, Alberto Moriconi, Cataldo Luciano Saragaglia, Diana Serra, Daniela De Venuto:
A real-time vital control module to increase capabilities of railway control systems in highly automated train operations. Real Time Syst. 59(4): 636-661 (2023) - [j21]Mario Barbareschi, Salvatore Barone, Nicola Mazzocca, Alberto Moriconi:
A Catalog-Based AIG-Rewriting Approach to the Design of Approximate Components. IEEE Trans. Emerg. Top. Comput. 11(1): 70-81 (2023) - [c50]Mario Barbareschi, Salvatore Barone, Valentina Casola, Salvatore Della Torca, Daniele Lombardi:
Automatic Test Generation to Improve Scrum for Safety Agile Methodology. ARES 2023: 137:1-137:6 - [c49]Mario Barbareschi, Valentina Casola, Daniele Lombardi:
Ensuring End-to-End Security in Computing Continuum Exploiting Physical Unclonable Functions. CloudCom 2023: 273-278 - [c48]Giovanni Mezzina, Arturo Amendola, Mario Barbareschi, Salvatore De Simone, Grazia Mascellaro, Alberto Moriconi, Cataldo Luciano Saragaglia, Diana Serra, Daniela De Venuto:
A Step Toward Safe Unattended Train Operations: A Pioneer Vital Control Module. DATE 2023: 1-4 - [c47]Ali Piri, Salvatore Pappalardo, Salvatore Barone, Mario Barbareschi, Bastien Deveautour, Marcello Traiola, Ian O'Connor, Alberto Bosio:
Input-aware accuracy characterization for approximate circuits. DSN-W 2023: 179-182 - [c46]Mario Barbareschi, Valentina Casola, Daniele Lombardi:
Lightweight Secure Keys Management Based on Physical Unclonable Functions. IWASI 2023: 34-39 - [c45]Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Sánchez, Mahdi Taheri:
Special Session: Approximation and Fault Resiliency of DNN Accelerators. VTS 2023: 1-10 - [i1]Mohammad Hasan Ahmadilivani, Mario Barbareschi, Salvatore Barone, Alberto Bosio, Masoud Daneshtalab, Salvatore Della Torca, Gabriele Gavarini, Maksim Jenihhin, Jaan Raik, Annachiara Ruospo, Ernesto Sánchez, Mahdi Taheri:
Special Session: Approximation and Fault Resiliency of DNN Accelerators. CoRR abs/2306.04645 (2023) - 2022
- [j20]Mario Barbareschi, Salvatore Barone, Alberto Bosio, Jie Han, Marcello Traiola:
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators. ACM J. Emerg. Technol. Comput. Syst. 18(3): 50:1-50:25 (2022) - [j19]Mario Barbareschi, Salvatore Barone, Riccardo Carbone, Valentina Casola:
Scrum for safety: an agile methodology for safety-critical software systems. Softw. Qual. J. 30(4): 1067-1088 (2022) - [c44]Giovanni Mezzina, Cataldo Luciano Saragaglia, Mario Barbareschi, Diana Serra, Salvatore De Simone, Alberto Moriconi, Daniela De Venuto:
Model-Based Vital Control Architecture for Highly Automated Train Operations. ApplePies 2022: 163-170 - [c43]Ali Piri, Sepide Saeedi, Mario Barbareschi, Bastien Deveautour, Stefano Di Carlo, Ian O'Connor, Alessandro Savino, Marcello Traiola, Alberto Bosio:
Input-Aware Approximate Computing. AQTR 2022: 1-6 - [c42]Mario Barbareschi, Alberto Bosio, Ian O'Connor, Petr Fiser, Marcello Traiola:
A Design Space Exploration Framework for Memristor-Based Crossbar Architecture. DDECS 2022: 38-43 - [c41]Mario Barbareschi, Salvatore Barone, Valentina Casola, Pasquale Montone, Alberto Moriconi:
A Memory Protection Strategy for Resource Constrained Devices in Safety Critical Applications. ICSRS 2022: 533-538 - 2021
- [j18]Salvatore Barone, Marcello Traiola, Mario Barbareschi, Alberto Bosio:
Multi-Objective Application-Driven Approximate Design Method. IEEE Access 9: 86975-86993 (2021) - [j17]Mario Barbareschi, Alberto Bosio, Lukás Sekanina, Claus Braun:
Editorial: Special issue on Advancing on Approximate Computing: Methodologies, Architectures and Algorithms. Future Gener. Comput. Syst. 124: 54-55 (2021) - [j16]Duccio Bertieri, Andrea Ceccarelli, Tommaso Zoppi, Innocenzo Mungiello, Mario Barbareschi, Andrea Bondavalli:
Development and validation of a safe communication protocol compliant to railway standards. J. Braz. Comput. Soc. 27(1): 5 (2021) - [j15]Mario Barbareschi, Salvatore Barone, Nicola Mazzocca:
Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study. Knowl. Inf. Syst. 63(6): 1577-1596 (2021) - [j14]Mario Barbareschi, Valentina Casola, Alessandra De Benedictis, Erasmo La Montagna, Nicola Mazzocca:
On the Adoption of Physically Unclonable Functions to Secure IIoT Devices. IEEE Trans. Ind. Informatics 17(11): 7781-7790 (2021) - [c40]Giovanni Mezzina, Mario Barbareschi, Salvatore De Simone, Alessandro Di Benedetto, G. Narracci, Cataldo Luciano Saragaglia, Diana Serra, Daniela De Venuto:
Smart On-Board Surveillance Module for Safe Autonomous Train Operations. ApplePies 2021: 317-325 - [c39]Riccardo Carbone, Salvatore Barone, Mario Barbareschi, Valentina Casola:
Scrum for Safety: Agile Development in Safety-Critical Software Systems. QUATIC 2021: 127-140 - [c38]Mario Barbareschi, Salvatore Barone, Alfonso Fezza, Erasmo La Montagna:
Enforcing Mutual Authentication and Confidentiality in Wireless Sensor Networks Using Physically Unclonable Functions: A Case Study. QUATIC 2021: 297-310 - 2020
- [j13]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
A Survey of Testing Techniques for Approximate Integrated Circuits. Proc. IEEE 108(12): 2178-2194 (2020) - [c37]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Maximizing Yield for Approximate Integrated Circuits. DATE 2020: 810-815
2010 – 2019
- 2019
- [j12]Mario Barbareschi, Alessandra De Benedictis, Erasmo La Montagna, Antonino Mazzeo, Nicola Mazzocca:
A PUF-based mutual authentication scheme for Cloud-Edges IoT systems. Future Gener. Comput. Syst. 101: 246-261 (2019) - [j11]Alberto Bosio, Mario Barbareschi:
Special Issue on Design, Technology, and Test of Integrated Circuits and Systems. J. Circuits Syst. Comput. 28(Supplement-1): 1902001:1-1902001:1 (2019) - [c36]Mario Barbareschi, Salvatore Barone, Antonino Mazzeo, Nicola Mazzocca:
Efficient Reed-Muller Implementation for Fuzzy Extractor Schemes. DTIS 2019: 1-2 - [c35]Duccio Bertieri, Tommaso Zoppi, Innocenzo Mungiello, Andrea Ceccarelli, Mario Barbareschi, Andrea Bondavalli:
Practical Experience Report: Implementation, Verification and Validation of a Safe and Secure Communication Protocol for the Railway Domain. LADC 2019: 1-6 - [c34]Mario Barbareschi, Alessandra De Benedictis, Erasmo La Montagna, Antonino Mazzeo, Nicola Mazzocca:
PUF-Enabled Authentication-as-a-Service in Fog-IoT Systems. WETICE 2019: 58-63 - 2018
- [j10]Mario Barbareschi, Alessandra De Benedictis, Nicola Mazzocca:
A PUF-based hardware mutual authentication protocol. J. Parallel Distributed Comput. 119: 107-120 (2018) - [j9]Marcello Traiola, Mario Barbareschi, Alberto Bosio:
Estimating dynamic power consumption for memristor-based CiM architecture. Microelectron. Reliab. 80: 241-248 (2018) - [j8]Mario Barbareschi, Giorgio Di Natale, Lionel Torres, Antonino Mazzeo:
A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(2): 700-711 (2018) - [j7]Domenico Amelino, Mario Barbareschi, Alessandro Cilardo:
An IP Core Remote Anonymous Activation Protocol. IEEE Trans. Emerg. Top. Comput. 6(2): 258-268 (2018) - [c33]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits. DDECS 2018: 85-90 - [c32]Umberto Ferrandino, Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Petr Fiser, Alberto Bosio:
Synthesis of Finite State Machines on Memristor Crossbars. DDECS 2018: 107-112 - [c31]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits. DFT 2018: 1-6 - [c30]Marcello Traiola, Alessandro Savino, Mario Barbareschi, Stefano Di Carlo, Alberto Bosio:
Predicting the Impact of Functional Approximation: from Component- to Application-Level. IOLTS 2018: 61-64 - [c29]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Testing approximate digital circuits: Challenges and opportunities. LATS 2018: 1-6 - 2017
- [j6]Mario Barbareschi, Pierpaolo Bagnasco:
Implementation of a reliable mechanism for protecting IP cores on low-end FPGA devices. Int. J. Embed. Syst. 9(4): 337-352 (2017) - [j5]Mario Barbareschi, Pierpaolo Bagnasco, Domenico Amelino, Antonino Mazzeo:
Designing an SRAM PUF-based secret extractor for resource-constrained devices. Int. J. Embed. Syst. 9(4): 353-364 (2017) - [c28]Imran Wali, Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Towards approximation during test of Integrated Circuits. DDECS 2017: 28-33 - [c27]Marcello Traiola, Mario Barbareschi, Alberto Bosio:
Formal Design Space Exploration for memristor-based crossbar architecture. DDECS 2017: 145-150 - [c26]Mario Barbareschi, Alberto Bosio, Hoang Anh Du Nguyen, Said Hamdioui, Marcello Traiola, Elena Ioana Vatajelu:
Memristive devices: Technology, design automation and computing frontiers. DTIS 2017: 1-8 - [c25]Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Towards digital circuit approximation by exploiting fault simulation. EWDTS 2017: 1-7 - [c24]Domenico Amelino, Mario Barbareschi, Alessandro Cilardo:
A Proposal for the Secure Activation and Licensing of FPGA IP Cores. ITASEC 2017: 29-37 - [c23]Alberto Bosio, Arnaud Virazel, Patrick Girard, Mario Barbareschi:
Approximate computing: Design & test for integrated circuits. LATS 2017: 1 - 2016
- [j4]Elena Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo Prinetto:
STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. ACM J. Emerg. Technol. Comput. Syst. 13(1): 5:1-5:21 (2016) - [j3]Mario Barbareschi, Giorgio Di Natale, Lionel Torres:
Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocess. Microsystems 47: 3-10 (2016) - [c22]Domenico Amelino, Mario Barbareschi, Antonino Mazzeo:
Chain-of-Trust for Microcontrollers using SRAM PUFs: the Linux Case Study. 3PGCIC 2016: 747-756 - [c21]Mario Barbareschi, Federico Iannucci, Antonino Mazzeo:
Automatic Design Space Exploration of Approximate Algorithms for Big Data Applications. AINA Workshops 2016: 40-45 - [c20]Mario Barbareschi:
Implementing Hardware Decision Tree Prediction: A Scalable Approach. AINA Workshops 2016: 87-92 - [c19]Mario Barbareschi, Alessandro Cilardo, Antonino Mazzeo:
Partial FPGA bitstream encryption enabling hardware DRM in mobile environments. Conf. Computing Frontiers 2016: 443-448 - [c18]Mario Barbareschi, Federico Iannucci, Antonino Mazzeo:
An extendible design exploration tool for supporting approximate computing techniques. DTIS 2016: 1-6 - [c17]Mario Barbareschi, Antonino Mazzeo, Salvatore Miranda:
Adopting Decision Tree Based Policy Enforcement Mechanism to Protect Reconfigurable Devices. IIMSS 2016: 73-81 - [c16]Domenico Amelino, Mario Barbareschi, Ermanno Battista, Antonino Mazzeo:
How to Manage Keys and Reconfiguration in WSNs Exploiting SRAM Based PUFs. IIMSS 2016: 109-119 - [c15]Mario Barbareschi, Federico Iannucci, Antonino Mazzeo:
A Pruning Technique for B&B Based Design Exploration of Approximate Computing Variants. ISVLSI 2016: 707-712 - [c14]Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Alberto Bosio:
XbarGen: A memristor based boolean logic synthesis tool. VLSI-SoC 2016: 1-6 - 2015
- [j2]Mario Barbareschi, Antonino Mazzeo, Antonino Vespoli:
Malicious traffic analysis on mobile devices: a hardware solution. Int. J. Big Data Intell. 2(2): 117-126 (2015) - [c13]Mario Barbareschi, Sara Romano, Antonino Mazzeo:
A Cloud Based Architecture for Massive Sensor Data Analysis in Health Monitoring Systems. 3PGCIC 2015: 521-526 - [c12]Mario Barbareschi, Pierpaolo Bagnasco, Antonino Mazzeo:
Authenticating IoT Devices with Physically Unclonable Functions Models. 3PGCIC 2015: 563-567 - [c11]Mario Barbareschi, Pierpaolo Bagnasco, Antonino Mazzeo:
Supply voltage variation impact on Anderson PUF quality. DTIS 2015: 1-6 - [c10]Mario Barbareschi, Ermanno Battista, Antonino Mazzeo, Nicola Mazzocca:
Testing 90 nm microcontroller SRAM PUF quality. DTIS 2015: 1-6 - [c9]Jérôme Rampon, Renaud Perillat, Lionel Torres, Pascal Benoit, Giorgio Di Natale, Mario Barbareschi:
Digital Right Management for IP Protection. ISVLSI 2015: 200-203 - [c8]Mario Barbareschi, Salvatore Del Prete, Francesco Gargiulo, Antonino Mazzeo, Carlo Sansone:
Decision Tree-Based Multiple Classifier Systems: An FPGA Perspective. MCS 2015: 194-205 - 2014
- [j1]Alessandro Cilardo, Mario Barbareschi, Antonino Mazzeo:
Secure distribution infrastructure for hardware digital contents. IET Comput. Digit. Tech. 8(6): 300-310 (2014) - [c7]Mario Barbareschi, Alessandra De Benedictis, Antonino Mazzeo, Antonino Vespoli:
Mobile Traffic Analysis Exploiting a Cloud Infrastructure and Hardware Accelerators. 3PGCIC 2014: 414-419 - [c6]Mario Barbareschi, Ermanno Battista, Antonino Mazzeo, Sridhar Venkatesan:
Advancing WSN physical security adopting TPM-based architectures. IRI 2014: 394-399 - [c5]Mario Barbareschi, Ermanno Battista, Nicola Mazzocca, Sridhar Venkatesan:
A hardware accelerator for data classification within the sensing infrastructure. IRI 2014: 400-405 - 2013
- [c4]Mario Barbareschi, Ermanno Battista, Valentina Casola, Antonino Mazzeo, Nicola Mazzocca:
On the Adoption of FPGA for Protecting Cyber Physical Infrastructures. 3PGCIC 2013: 430-435 - [c3]Flora Amato, Mario Barbareschi, Valentina Casola, Antonino Mazzeo, Sara Romano:
Towards Automatic Generation of Hardware Classifiers. ICA3PP (2) 2013: 125-132 - [c2]Mario Barbareschi, Antonino Mazzeo, Antonino Vespoli:
Network Traffic Analysis Using Android on a Hybrid Computing Architecture. ICA3PP (2) 2013: 141-148 - [c1]Flora Amato, Mario Barbareschi, Valentina Casola, Antonino Mazzeo:
An FPGA-Based Smart Classifier for Decision Support Systems. IDC 2013: 289-299
Coauthor Index
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last updated on 2024-10-23 20:29 CEST by the dblp team
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