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Guillaume Moritz
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2020 – today
- 2024
- [c7]Arnaud Verdant, William Guicquero, David Coriat, Guillaume Moritz, Nicolas Royer, Sébastien Thuries, Anais Mollard, Vincent Teil, Yann Desprez, Gilles Monnot, Pierre Malinge, Bruno Paille, Guillaume Caubit, Arnaud Bourge, Laurent Tardif, Stephanie Bigault, Jérôme Chossat:
A 450µW@50fps Wake-Up Module Featuring Auto-Bracketed 3-Scale Log-Corrected Pattern Recognition and Motion Detection in a 1.5Mpix 8T Global Shutter Imager. VLSI Technology and Circuits 2024: 1-2 - 2021
- [j2]Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, César Fuguet Tortolero, Ivan Miro-Panades, Guillaume Moritz, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy:
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. IEEE J. Solid State Circuits 56(1): 79-97 (2021) - 2020
- [c6]Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, Guillaume Moritz, Ivan Miro-Panades, César Fuguet Tortolero, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy:
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. ISSCC 2020: 46-48 - [c5]Margaux Vigier, Thomas Pilloix, Bertrand Dupont, Guillaume Moritz:
Very High Brightness, High Resolution CMOS Driving Circuit for Microdisplay in Augmented Reality. MWSCAS 2020: 876-879 - [c4]Arnaud Verdant, William Guicquero, Nicolas Royer, Guillaume Moritz, Sébastien Martin, Florent Lepin, Sylvain Choisnet, Fabrice Guellec, Benoît Deschamps, Sylvain Clerc, Jérôme Chossat:
A 3.0μW@5fps QQVGA Self-Controlled Wake-Up Imager with On-Chip Motion Detection, Auto-Exposure and Object Recognition. VLSI Circuits 2020: 1-2
2010 – 2019
- 2017
- [j1]Anuj Grover, G. S. Visweswaran, Chittoor R. Parthasarathy, Mohammad Daud, David Turgis, Bastien Giraud, Jean-Philippe Noel, Ivan Miro Panades, Guillaume Moritz, Edith Beigné, Philippe Flatresse, Promod Kumar, Shamsi Azmi:
A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2438-2447 (2017) - 2015
- [c3]Anuj Grover, Promod Kumar, Mohammad Daud, G. S. Visweswaran, Chittoor R. Parthasarathy, Jean-Philippe Noel, David Turgis, Bastien Giraud, Guillaume Moritz:
Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs. ICICDT 2015: 1-4 - 2013
- [c2]Edith Beigné, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson:
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. DATE 2013: 613-618 - [c1]Guillaume Moritz, Bastien Giraud, Jean-Philippe Noel, David Turgis, Anuj Grover:
Optimization of a voltage sense amplifier operating in ultra wide voltage range with back bias design techniques in 28nm UTBB FD-SOI technology. ICICDT 2013: 53-56
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last updated on 2024-10-18 19:28 CEST by the dblp team
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