default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDTakefumi Miyoshi
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
[c26]Ryosuke Matsuo, Kazuhisa Ogawa, Hidehisa Shiorni, Makoto Negoro, Ryutaco Ohira, Takefumi Miyoshi, Micdihiro Shintani, Hiromitsu Awano, Takashi Sato, Jun Shiomi:
Square-Wave Defined Pulse Generator for High Fidelity Gate Operation of Superconducting Qubits. QCE 2024: 378-379- [c25]Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Toshi Sumida, Makoto Negoro, Atsushi Noguchi, Ryutaro Ohira:
A Microwave-Based QCCD Trapped-Ion Quantum Computer with Scalable Control System. QCE 2024: 470-471 - [c24]Takashi Imagawa, Ryo Kishida, Yuki Koyama, Kazutoshi Kobayashi, Takefumi Miyoshi:
A Power Reduction Scheme by Arithmetic Format Conversion for a DSP to Estimate Qubit States Under 4K Cryogenic Environment. QCE 2024: 539-540 - 2023
- [c23]Kaijie Wei, Ryohei Niwase, Hideharu Amano, Yoshiki Yamaguchi, Takefumi Miyoshi:
A state vector quantum simulator working on FPGAs with extensible SATA storage. ICFPT 2023: 272-273 - [c22]Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi, Kaijie Wei, Hideharu Amano, Takefumi Miyoshi:
Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages. ICFPT 2023: 288-289 - [c21]Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Hidehisa Shiomi, Ryo Matsuda, Kazuhisa Ogawa, Yutaka Tabuchi, Makoto Negoro:
A Fully Pipelined Architecture of Quantum-Classical Interface for Realizing Fault-Tolerant Quantum Computer. QCE 2023: 322-323 - 2022
- [c20]Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Hidehisa Shiomi, Kazuhisa Ogawa, Yutaka Tabuchi, Makoto Negoro:
FPL Demo: A Flexible and Scalable Quantum-Classical Interface based on FPGAs. FPL 2022: 473
2010 – 2019
- 2017
- [c19]Yuto Ishikawa, Keitaro Yanai, Keisuke Koike, Takefumi Miyoshi, Hironori Nakajo:
Hardware Acceleration with Multi-Threading of Java-Based High Level Synthesis Tool. HEART 2017: 8:1-8:6 - 2015
- [j8]Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, Tsutomu Yoshinaga:
Design and Evaluation of a Configurable Query Processing Hardware for Data Streams. IEICE Trans. Inf. Syst. 98-D(12): 2207-2217 (2015) - [c18]Abraham Monrroy, Manato Hirabayashi, Shinpei Kato, Masato Edahiro, Takefumi Miyoshi, Satoshi Funada:
Hexa Cam: An FPGA-Based Multi-view Camera System. CPSNA 2015: 48-53 - 2013
- [c17]Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, Tsutomu Yoshinaga:
An Efficient and Scalable Implementation of Sliding-Window Aggregate Operator on FPGA. CANDAR 2013: 112-121 - [c16]Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga:
A fast handshake join implementation on FPGA with adaptive merging network. SSDBM 2013: 44:1-44:4 - 2012
- [j7]Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga:
Design and Implementation of a Handshake Join Architecture on FPGA. IEICE Trans. Inf. Syst. 95-D(12): 2919-2927 (2012) - [j6]Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga:
Using Cacheline Reuse Characteristics for Prefetcher Throttling. IEICE Trans. Inf. Syst. 95-D(12): 2928-2938 (2012) - [c15]Takefumi Miyoshi, Hidetsugu Irie, Keigo Shima, Hiroki Honda, Masaaki Kondo, Tsutomu Yoshinaga:
FLAT: a GPU programming framework to provide embedded MPI. GPGPU@ASPLOS 2012: 20-29 - [c14]Yicheng Guan, Cisse Ahmadou Dit Adi, Takefumi Miyoshi, Michihiro Koibuchi, Hidetsugu Irie, Tsutomu Yoshinaga:
Throttling Control for Bufferless Routing in On-chip Networks. MCSoC 2012: 37-44 - [c13]Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga:
Design and Implementation of a Merging Network Architecture for Handshake Join Operator on FPGA. MCSoC 2012: 84-91 - 2011
- [j5]Junichi Ohmura, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga:
Computation-Communication Overlap of Linpack on a GPU-Accelerated PC Cluster. IEICE Trans. Inf. Syst. 94-D(12): 2319-2327 (2011) - [j4]Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga:
An Efficient Path Setup for a Hybrid Photonic Network-on-Chip. Int. J. Netw. Comput. 1(2): 244-259 (2011) - [c12]Takefumi Miyoshi, Hideyuki Kawashima, Yuta Terada, Tsutomu Yoshinaga:
A Coarse Grain Reconfigurable Processor Architecture for Stream Processing Engine. FPL 2011: 490-495 - [c11]Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga:
An Implementation of Handshake Join on FPGA. ICNC 2011: 95-104 - [c10]Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga:
CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection. ICNC 2011: 127-133 - [c9]Junichi Ohmura, Akira Egashira, Shunji Satoh, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga:
Multi-GPU Acceleration of Optical Flow Computation in Visual Functional Simulation. ICNC 2011: 228-234 - 2010
- [c8]Takefumi Miyoshi, Kenji Kise, Hidetsugu Irie, Tsutomu Yoshinaga:
CODIE: Continuation-Based Overlapping Data-Transfers with Instruction Execution. ICNC 2010: 71-77 - [c7]Shinya Takamaeda, Shimpei Sato, Takefumi Miyoshi, Kenji Kise:
Smart Core System for Dependable Many-Core Processor with Multifunction Routers. ICNC 2010: 133-139 - [c6]Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga:
An Efficient Path Setup for a Photonic Network-on-Chip. ICNC 2010: 156-161 - [c5]Shintaro Sano, Masahiro Sano, Shimpei Sato, Takefumi Miyoshi, Kenji Kise:
Pattern-Based Systematic Task Mapping for Many-Core Processors. ICNC 2010: 173-178 - [c4]Qin Wang, Junichi Ohmura, Axida Shan
, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga:
Parallel Matrix-Matrix Multiplication Based on HPL with a GPU-Accelerated PC Cluster. ICNC 2010: 243-248 - [c3]Cisse Ahmadou Dit Adi, Ping Qiu, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga:
OREX - An Optical Ring with Electrical Crossbar Hybrid Photonic Network-on-Chip. IWIA 2010: 3-10
2000 – 2009
- 2009
- [c2]Koh Uehara, Shimpei Sato, Takefumi Miyoshi, Kenji Kise:
A Study of an Infrastructure for Research and Development of Many-Core Processors. PDCAT 2009: 414-419 - [c1]Kenichi Koizumi, Mary Inaba, Kei Hiraki, Yasuo Ishii, Takefumi Miyoshi, Kazuki Yoshizoe:
Triple Line-Based Playout for Go - An Accelerator for Monte Carlo Go. ReConFig 2009: 161-166 - 2007
- [j3]Takefumi Miyoshi, Nobuhiko Sugino:
Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation. IEICE Trans. Inf. Syst. 90-D(12): 1967-1976 (2007) - [j2]Takefumi Miyoshi, Nobuhiko Sugino:
Fine-grain compensation method with consideration of trade-offs between computation and data transfer for power consumption. SIGARCH Comput. Archit. News 35(5): 39-44 (2007) - 2005
- [j1]Takefumi Miyoshi, Nobuhiko Sugino:
Unified Phase Compiler by Use of 3-D Representation Space. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(4): 838-845 (2005)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-01-26 23:51 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
