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ORCIDMikko H. Lipasti
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- affiliation: University of Wisconsin-Madison, USA
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2020 – today
- 2024
[j26]Kyle Daruwalla
, Mikko H. Lipasti:
Information bottleneck-based Hebbian learning rule naturally ties working memory and synaptic updates. Frontiers Comput. Neurosci. 18 (2024)- 2023
- [j25]Soroosh Khoram, Kyle Daruwalla, Mikko H. Lipasti:
Energy-Efficient Bayesian Inference Using Bitstream Computing. IEEE Comput. Archit. Lett. 22(1): 37-40 (2023) - [j24]Sooraj Puthoor, Mikko H. Lipasti:
Turn-based Spatiotemporal Coherence for GPUs. ACM Trans. Archit. Code Optim. 20(3): 33:1-33:27 (2023) - [j23]Gokul Subramanian Ravi, Tushar Krishna, Mikko H. Lipasti:
TNT: A Modular Approach to Traversing Physically Heterogeneous NOCs at Bare-wire Latency. ACM Trans. Archit. Code Optim. 20(3): 35:1-35:25 (2023) - [c98]Heng Zhuo, Mikko H. Lipasti:
TailWAG: Tail Latency Workload Analysis and Generation. BID@PPOPP 2023: 1:1-1:9 - 2022
- [c97]David J. Schlais, Heng Zhuo, Mikko H. Lipasti:
Work-in-Progress: NoRF: A Case Against Register File Operands in Tightly-Coupled Accelerators. CASES 2022: 33-34 - [c96]Chien-Fu Chen, Mikko H. Lipasti:
PrGEMM: A Parallel Reduction SpGEMM Accelerator. ACM Great Lakes Symposium on VLSI 2022: 397-401 - 2021
- [j22]Sooraj Puthoor, Mikko H. Lipasti:
Systems-on-Chip with Strong Ordering. ACM Trans. Archit. Code Optim. 18(1): 15:1-15:27 (2021) - [c95]Gokul Subramanian Ravi, Ramon Bertran, Pradip Bose, Mikko H. Lipasti:
MicroGrad: A Centralized Framework for Workload Cloning and Stress Testing. ISPASS 2021: 70-72 - [i4]Ravi S. Raju, Kyle Daruwalla, Mikko H. Lipasti:
Accelerating Deep Learning with Dynamic Data Pruning. CoRR abs/2111.12621 (2021) - [i3]Kyle Daruwalla, Mikko H. Lipasti:
Information Bottleneck-Based Hebbian Learning Rule Naturally Ties Working Memory and Synaptic Updates. CoRR abs/2111.13187 (2021) - 2020
- [j21]Rahul Singh, Gokul Subramanian Ravi, Mikko H. Lipasti, Joshua San Miguel:
Value Locality Based Approximation With ODIN. IEEE Comput. Archit. Lett. 19(2): 88-91 (2020) - [j20]Kyle Daruwalla, Heng Zhuo, Rohit Shukla, Mikko H. Lipasti:
BitSAD v2: Compiler Optimization and Analysis for Bitstream Computing. ACM Trans. Archit. Code Optim. 16(4): 43:1-43:25 (2020) - [j19]Gokul Subramanian Ravi, Joshua San Miguel, Mikko H. Lipasti:
SHASTA: Synergic HW-SW Architecture for Spatio-temporal Approximation. ACM Trans. Archit. Code Optim. 17(4): 25:1-25:26 (2020) - [c94]Ravi S. Raju, Mikko H. Lipasti:
BlurNet: Defense by Filtering the Feature Maps. DSN Workshops 2020: 38-46 - [c93]David J. Schlais, Heng Zhuo, Mikko H. Lipasti:
Modeling Architectural Support for Tightly-Coupled Accelerators. ISPASS 2020: 253-262 - [i2]Gokul Subramanian Ravi, Ramon Bertran, Pradip Bose, Mikko H. Lipasti:
MicroGrad: A Centralized Framework for Workload Cloning and Stress Testing. CoRR abs/2009.04622 (2020)
2010 – 2019
- 2019
- [c92]Gokul Subramanian Ravi, Mikko H. Lipasti:
Recycling Data Slack in Out-of-Order Cores. HPCA 2019: 545-557 - [c91]Di Wu, Tianen Chen, Chien-Fu Chen, Oghenefego Ahia, Joshua San Miguel, Mikko H. Lipasti, Younghyun Kim:
SECO: A Scalable Accuracy Approximate Exponential Function Via Cross-Layer Optimization. ISLPED 2019: 1-6 - [c90]Kyle Daruwalla, Heng Zhuo, Carly Schulz, Mikko H. Lipasti:
BitBench: a benchmark for bitstream computing. LCTES 2019: 177-187 - [i1]Ravi S. Raju, Mikko H. Lipasti:
BlurNet: Defense by Filtering the Feature Maps. CoRR abs/1908.02256 (2019) - 2018
- [c89]Sooraj Puthoor, Mikko H. Lipasti:
Compiler assisted coalescing. PACT 2018: 11:1-11:11 - [c88]Gokul Subramanian Ravi, Mikko H. Lipasti:
Aggressive Slack Recycling via Transparent Pipelines. ISLPED 2018: 15:1-15:6 - 2017
- [j18]Gokul Subramanian Ravi, Mikko H. Lipasti:
Timing Speculation in Multi-Cycle Data Paths. IEEE Comput. Archit. Lett. 16(1): 84-87 (2017) - [j17]Vignyan Reddy Kothinti Naresh, Dibakar Gope, Mikko H. Lipasti:
The CURE: Cluster Communication Using Registers. ACM Trans. Embed. Comput. Syst. 16(5s): 124:1-124:19 (2017) - [c87]Rohit Shukla, Erik Jorgensen, Mikko H. Lipasti:
Evaluating hopfield-network-based linear solvers for hardware constrained neural substrates. IJCNN 2017: 3938-3945 - [c86]Gokul Subramanian Ravi, Mikko H. Lipasti:
CHARSTAR: Clock Hierarchy Aware Resource Scaling in Tiled ARchitectures. ISCA 2017: 147-160 - [c85]Dibakar Gope, David J. Schlais, Mikko H. Lipasti:
Architectural Support for Server-Side PHP Processing. ISCA 2017: 507-520 - [c84]Michael Mishkin, Nam Sung Kim, Mikko H. Lipasti:
Temporal codes in on-chip interconnects. ISLPED 2017: 1-6 - 2016
- [c83]Dibakar Gope, Mikko H. Lipasti:
Hash Map Inlining. PACT 2016: 235-246 - [c82]David J. Schlais, Mikko H. Lipasti:
BADGR: A practical GHR implementation for TAGE branch predictors. ICCD 2016: 536-543 - 2015
- [j16]Zhong Zheng, Zhiying Wang, Mikko H. Lipasti:
Adaptive Cache and Concurrency Allocation on GPGPUs. IEEE Comput. Archit. Lett. 14(2): 90-93 (2015) - [c81]Amir Yazdanbakhsh, David J. Palframan, Azadeh Davoodi, Nam Sung Kim, Mikko H. Lipasti:
Online and Operand-Aware Detection of Failures Utilizing False Alarm Vectors. ACM Great Lakes Symposium on VLSI 2015: 149-154 - [c80]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
iPatch: Intelligent fault patching to improve energy efficiency. HPCA 2015: 428-438 - [c79]Sean Franey, Mikko H. Lipasti:
Tag tables. HPCA 2015: 514-525 - [c78]Rohit Shukla, Mikko H. Lipasti:
A self-learning map-seeking circuit for visual object recognition. IJCNN 2015: 1-8 - [c77]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
COP: to compress and protect main memory. ISCA 2015: 682-693 - 2014
- [c76]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Precision-aware soft error protection for GPUs. HPCA 2014: 49-59 - [c75]Dibakar Gope, Mikko H. Lipasti:
Atomic SC for simple in-order processors. HPCA 2014: 404-415 - [c74]Mitchell Hayenga, Vignyan Reddy Kothinti Naresh, Mikko H. Lipasti:
Revolver: Processor architecture for power efficient loop execution. HPCA 2014: 591-602 - [c73]Zhong Zheng, Zhiying Wang, Mikko H. Lipasti:
Tag check elision. ISLPED 2014: 351-356 - [c72]Dibakar Gope, Mikko H. Lipasti:
Bias-Free Branch Predictor. MICRO 2014: 521-532 - 2013
- [j15]Andrew Nere, Sean Franey, Atif Hashmi, Mikko H. Lipasti:
Simulating cortical networks on heterogeneous multi-GPU systems. J. Parallel Distributed Comput. 73(7): 953-971 (2013) - [j14]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Resilient High-Performance Processors with Spare RIBs. IEEE Micro 33(4): 26-34 (2013) - [c71]Andrew Nere, Atif Hashmi, Mikko H. Lipasti, Giulio Tononi:
Bridging the semantic gap: Emulating biological neuronal behaviors with simple digital neurons. HPCA 2013: 472-483 - [c70]Mushfique Junayed Khurshid, Mikko H. Lipasti:
Data compression for thermal mitigation in the Hybrid Memory Cube. ICCD 2013: 185-192 - [c69]Vignyan Reddy, Syed Zohaib Gilani, Erika Gunadi, Nam Sung Kim, Michael J. Schulte, Mikko H. Lipasti:
REEL: Reducing effective execution latency of floating point operations. ISLPED 2013: 187-192 - [c68]Arslan Zulfiqar, Pranay Koka, Herb Schwetman, Mikko H. Lipasti, Xuezhe Zheng, Ashok V. Krishnamoorthy:
Wavelength stealing: an opportunistic approach to channel sharing in multi-chip photonic interconnects. MICRO 2013: 222-233 - [c67]Sean Franey, Mikko H. Lipasti:
Accelerating atomic operations on GPGPUs. NOCS 2013: 1-8 - 2012
- [c66]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Mitigating random variation with spare RIBs: Redundant intermediate bitslices. DSN 2012: 1-11 - [c65]Tianshi Chen, Yunji Chen, Marc Duranton, Qi Guo, Atif Hashmi, Mikko H. Lipasti, Andrew Nere, Shi Qiu, Michèle Sebag, Olivier Temam:
BenchNN: On the broad potential application scope of hardware neural network accelerators. IISWC 2012: 36-45 - [c64]Harold W. Cain, Mikko H. Lipasti:
Edge chasing delayed consistency: pushing the limits of weak memory models. RACES@SPLASH 2012: 15-24 - 2011
- [j13]Natalie D. Enright Jerger, Mikko H. Lipasti:
Systems for Very Large-Scale Computing. IEEE Micro 31(3): 4-7 (2011) - [c63]Atif Hashmi, Andrew Nere, James Jamal Thomas, Mikko H. Lipasti:
A case for neuromorphic ISAs. ASPLOS 2011: 145-158 - [c62]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Time redundant parity for low-cost transient error detection. DATE 2011: 52-57 - [c61]Dana Vantrease, Mikko H. Lipasti, Nathan L. Binkert:
Atomic Coherence: Leveraging nanophotonics to build race-free cache coherence protocols. HPCA 2011: 132-143 - [c60]Andrew Nere, Atif Hashmi, Mikko H. Lipasti:
Profiling Heterogeneous Multi-GPU Systems to Accelerate Cortically Inspired Learning Algorithms. IPDPS 2011: 906-920 - [c59]Atif Hashmi, Hugues Berry, Olivier Temam, Mikko H. Lipasti:
Automatic abstraction and fault tolerance in cortical microachitectures. ISCA 2011: 1-10 - [c58]Erika Gunadi, Mikko H. Lipasti:
CRIB: consolidated rename, issue, and bypass. ISCA 2011: 23-32 - [c57]Guangyu Shi, Min Li, Mikko H. Lipasti:
Accelerating search and recognition workloads with SSE 4.2 string and text processing instructions. ISPASS 2011: 145-153 - [c56]Mitchell Hayenga, Mikko H. Lipasti:
The NoX router. MICRO 2011: 36-46 - [c55]Vignyan Reddy Kothinti Naresh, David J. Palframan, Mikko H. Lipasti:
CRAM: coded registers for amplified multiporting. MICRO 2011: 196-205 - 2010
- [c54]Andrew Nere, Mikko H. Lipasti:
Cortical architectures on a GPGPU. GPGPU 2010: 12-18 - [c53]Atif Hashmi, Mikko H. Lipasti:
Discovering Cortical Algorithms. IJCCI (ICFC-ICNC) 2010: 196-204 - [c52]Atif Hashmi, Mikko H. Lipasti:
A Cortically Inspired Learning Model. IJCCI (Selected Papers) 2010: 373-388 - [c51]Erika Gunadi, Abhishek A. Sinkar, Nam Sung Kim, Mikko H. Lipasti:
Combating Aging with the Colt Duty Cycle Equalizer. MICRO 2010: 103-114
2000 – 2009
- 2009
- [c50]Atif Hashmi, Mikko H. Lipasti:
Cortical columns: Building blocks for intelligent systems. CIMSIVP 2009: 21-28 - [c49]Dennis Abts, Natalie D. Enright Jerger, John Kim, Dan Gibson, Mikko H. Lipasti:
Achieving predictable performance through better memory controller placement in many-core CMPs. ISCA 2009: 451-461 - [c48]Mitchell Hayenga, Natalie D. Enright Jerger, Mikko H. Lipasti:
SCARAB: a single cycle adaptive routing and bufferless network. MICRO 2009: 244-254 - [c47]Dana Vantrease, Nathan L. Binkert, Robert Schreiber, Mikko H. Lipasti:
Light speed arbitration and flow control for nanophotonic interconnects. MICRO 2009: 304-315 - 2008
- [c46]Gordon B. Bell, Mikko H. Lipasti:
Skewed redundancy. PACT 2008: 62-71 - [c45]Eric L. Hill, Mikko H. Lipasti, Kewal K. Saluja:
An accurate flip-flop selection technique for reducing logic SER. DSN 2008: 128-136 - [c44]Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti, James E. Smith:
Power-Efficient DRAM Speculation. HPCA 2008: 317-328 - [c43]Atif Hashmi, Mikko H. Lipasti:
Accelerating search and recognition with a TCAM functional unit. ICCD 2008: 81-86 - [c42]Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti:
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support. ISCA 2008: 229-240 - [c41]Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti:
Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence. MICRO 2008: 35-46 - [c40]Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti:
Circuit-Switched Coherence. NOCS 2008: 193-202 - 2007
- [j12]Natalie D. Enright Jerger, Mikko H. Lipasti, Li-Shiuan Peh:
Circuit-Switched Coherence. IEEE Comput. Archit. Lett. 6(1): 5-8 (2007) - [j11]Erika Gunadi, Mikko H. Lipasti:
Narrow Width Dynamic Scheduling. J. Instr. Level Parallelism 9 (2007) - [c39]Erika Gunadi, Mikko H. Lipasti:
A position-insensitive finished store buffer. ICCD 2007: 105-112 - [c38]Eric L. Hill, Mikko H. Lipasti:
Transparent mode flip-flops for collapsible pipelines. ICCD 2007: 553-560 - [c37]Natalie D. Enright Jerger, Dana Vantrease, Mikko H. Lipasti:
An Evaluation of Server Consolidation Workloads for Multi-Core Designs. IISWC 2007: 47-56 - [c36]Erika Gunadi, Mikko H. Lipasti:
Power-aware operand delivery. ISLPED 2007: 375-378 - [c35]Lixin Su, Mikko H. Lipasti:
Speculative optimization using hardware-monitored guarded regions for java virtual machines. VEE 2007: 22-32 - 2006
- [j10]Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti:
Energy Estimation of the Memory Subsystem in Multiprocessor Systems. J. Low Power Electron. 2(3): 325-332 (2006) - [j9]Jason F. Cantin, James E. Smith, Mikko H. Lipasti, Andreas Moshovos, Babak Falsafi:
Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays. IEEE Micro 26(1): 70-79 (2006) - [c34]Jason F. Cantin, Mikko H. Lipasti, James E. Smith:
Stealth prefetching. ASPLOS 2006: 274-282 - [c33]Lixin Su, Mikko H. Lipasti:
Dynamic Class Hierarchy Mutation. CGO 2006: 98-110 - [c32]Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E. Smith:
An approach for implementing efficient superscalar CISC processors. HPCA 2006: 41-52 - [c31]Eric L. Hill, Mikko H. Lipasti:
Stall cycle redistribution in a transparent fetch pipeline. ISLPED 2006: 31-36 - [c30]Natalie D. Enright Jerger, Eric L. Hill, Mikko H. Lipasti:
Friendly fire: understanding the effects of multiprocessor prefetches. ISPASS 2006: 177-188 - 2005
- [j8]Jason F. Cantin, Mikko H. Lipasti, James E. Smith:
The Complexity of Verifying Memory Coherence and Consistency. IEEE Trans. Parallel Distributed Syst. 16(7): 663-671 (2005) - [c29]Jason F. Cantin, Mikko H. Lipasti, James E. Smith:
Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking. ISCA 2005: 246-257 - [c28]Kevin M. Lepak, Mikko H. Lipasti:
Reaping the Benefit of Temporal Silence to Improve Communication Performance. ISPASS 2005: 258-268 - 2004
- [j7]Harold W. Cain, Mikko H. Lipasti, Ravi Nair:
Constraint Graph Analysis of Multithreaded Programs. J. Instr. Level Parallelism 6 (2004) - [j6]Harold W. Cain, Mikko H. Lipasti:
Memory Ordering: A Value-Based Approach. IEEE Micro 24(6): 110-117 (2004) - [c27]Ilhyun Kim, Mikko H. Lipasti:
Understanding Scheduling Replay Schemes. HPCA 2004: 198-209 - [c26]Harold W. Cain, Mikko H. Lipasti:
Memory Ordering: A Value-Based Approach. ISCA 2004: 90-101 - [c25]Mikko H. Lipasti, Brian R. Mestan, Erika Gunadi:
Physical Register Inlining. ISCA 2004: 325-337 - [c24]Gordon B. Bell, Mikko H. Lipasti:
Deconstructing commit. ISPASS 2004: 68-77 - 2003
- [c23]Harold W. Cain, Mikko H. Lipasti, Ravi Nair:
Constraint Graph Analysis of Multithreaded Programs. IEEE PACT 2003: 4-14 - [c22]Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti:
Redeeming IPC as a Performance Metric for Multithreaded Programs. IEEE PACT 2003: 232-243 - [c21]Brian R. Mestan, Mikko H. Lipasti:
Exploiting Partial Operand Knowledge. ICPP 2003: 369-378 - [c20]Ilhyun Kim, Mikko H. Lipasti:
Half-Price Architecture. ISCA 2003: 28-38 - [c19]Ilhyun Kim, Mikko H. Lipasti:
Macro-op Scheduling: Relaxing Scheduling Loop Constraints. MICRO 2003: 277-290 - [c18]Jason F. Cantin, Mikko H. Lipasti, James E. Smith:
The complexity of verifying memory coherence. SPAA 2003: 254-255 - 2002
- [c17]Kevin M. Lepak, Mikko H. Lipasti:
Temporally silent stores. ASPLOS 2002: 30-41 - [c16]Jarrod A. Lewis, Mikko H. Lipasti, Bryan Black:
Avoiding Initialization Misses to the Heap. ISCA 2002: 183-194 - [c15]Ilhyun Kim, Mikko H. Lipasti:
Implementing Optimizations at Decode Time. ISCA 2002: 221-232 - [c14]Harold W. Cain, Mikko H. Lipasti:
Verifying sequential consistency using vector clocks. SPAA 2002: 153-154 - [c13]Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti:
Minimizing Energy Consumption for High-Performance Processing. ASP-DAC/VLSI Design 2002: 199- - 2001
- [j5]Harold W. Cain, Kevin M. Lepak, Mikko H. Lipasti:
A dynamic binary translation approach to architectural simulation. SIGARCH Comput. Archit. News 29(1): 27-36 (2001) - [j4]Kevin M. Lepak, Gordon B. Bell, Mikko H. Lipasti:
Silent Stores and Store Value Locality. IEEE Trans. Computers 50(11): 1174-1190 (2001) - [c12]Harold W. Cain, Ravi Rajwar, Morris Marden, Mikko H. Lipasti:
An Architectural Evaluation of Java TPC-W. HPCA 2001: 229-240 - [c11]Milo M. K. Martin, Daniel J. Sorin, Harold W. Cain, Mark D. Hill, Mikko H. Lipasti:
Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing. MICRO 2001: 328-337 - 2000
- [j3]Steven R. Kunkel, Richard J. Eickemeyer, Mikko H. Lipasti, Timothy J. Mullins, Brian O'Krafka, Harold Rosenberg, Steven P. Vanderwiel, Philip L. Vitale, Larry D. Whitley:
A performance methodology for commercial servers. IBM J. Res. Dev. 44(6): 851-872 (2000) - [c10]Gordon B. Bell, Kevin M. Lepak, Mikko H. Lipasti:
Characterization of Silent Stores. IEEE PACT 2000: 133-144 - [c9]Kevin M. Lepak, Mikko H. Lipasti:
On the value locality of store instructions. ISCA 2000: 182-191 - [c8]Kevin M. Lepak, Mikko H. Lipasti:
Silent stores for free. MICRO 2000: 22-31
1990 – 1999
- 1999
- [c7]Derek L. Howard, Mikko H. Lipasti:
The Effect of Program Optimization on Trace Cache Efficiency. IEEE PACT 1999: 256-261 - 1998
- [j2]Mikko H. Lipasti, John Paul Shen:
Exploiting Value Locality to Exceed the Dataflow Limit. Int. J. Parallel Program. 26(4): 505-538 (1998) - 1997
- [j1]Mikko H. Lipasti, John Paul Shen:
Superspeculative Microarchitecture for Beyond AD 2000. Computer 30(9): 59-66 (1997) - [c6]Mikko H. Lipasti, John Paul Shen:
The Performance Potential of Value and Dependence Prediction. Euro-Par 1997: 1043-1052 - 1996
- [c5]Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen:
Value Locality and Load Value Prediction. ASPLOS 1996: 138-147 - [c4]Bryan Black, Andrew S. Huang, Mikko H. Lipasti, John Paul Shen:
Can Trace-Driven Simulators Accurately Predict Superscalar Performance? ICCD 1996: 478-485 - [c3]Mikko H. Lipasti, John Paul Shen:
Exceeding the Dataflow Limit via Value Prediction. MICRO 1996: 226-237 - 1995
- [c2]Mikko H. Lipasti, William J. Schmidt, Steven R. Kunkel, Robert R. Roediger:
SPAID: software prefetching in pointer- and call-intensive environments. MICRO 1995: 231-236 - 1993
- [c1]Trung A. Diep, Mikko H. Lipasti, John Paul Shen:
Architecture-Compatible Code Boosting for Performance Enhancement of the IBM RS/6000. ICCD 1993: 86-93
Coauthor Index
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