default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDJournal of Low Power Electronics, Volume 14
Volume 14, Number 1, March 2018
- Mohamad El Ahmad, Mohamad Najem, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
PoETE: A Method to Design Temperature-Aware Integrated Systems. 1-7 - Ananya Ravikumar, C. P. Ravikumar:
Architectural Optimization of Hierarchically Organized Wireless Sensor Networks for Energy, Cost, and Security. 8-17 - Santosh Koppa, Eugene John
:
Performance Tradeoffs in the Design of Low-Power SRAM Arrays for Implantable Devices. 18-27 - Maher Assaad:
A Hardware Description Language-Based Serial Link for Multicores SoC/NoC Interconnect. 28-37 - Fahimeh Danehdaran, Milad Bagherian Khosroshahy, Keivan Navi, Nader Bagherzadeh:
Design and Power Analysis of New Coplanar One-Bit Full-Adder Cell in Quantum-Dot Cellular Automata. 38-48 - Shasanka Sekhar Rout, S. K. Mohapatra, Kabiraj Sethi:
Design of Cascode Mixer Based on Bulk Injection and Switched Biasing Techniques in 180 nm CMOS Process for a High Performance Receiver Front End. 49-56 - Emeshaw Ashenafi, Abdul Hamid Bin Yousuf, Masud H. Chowdhury:
Investigation and Optimization of Spiral Inductor Design for On-Chip Buck Converter. 57-66 - Parthiban Perumal, Deepak Ronanki, Banagar Kiran:
A Fixed Frequency Duty-Ratio Based Digital Sliding-Mode Controller for DC-DC Buck Converter. 67-77 - Suresh Alapati, Sreehari Rao Patri:
Capacitor Less Voltage Regulator with Split Drive Error Amplifier for Segmented Pass Transistors. 78-85 - Davide Appello, Paolo Bernardi, Conrad Bugeja, Riccardo Cantoro, Andrea Colazzo, Alessandro Motta, Alberto Pagani, Giorgio Pollaccia, Marco Restifo, Ernesto Sánchez, Federico Venini:
An Evolutionary Algorithm Approach to Stress Program Generation During Burn-In. 86-98 - Maurizio Valle, Ali Ibrahim, Maurizio Martina, Michele Magno:
Selected Articles from the NGCAS 2017 Conference. 99-100 - Michele Magno, Ali Ibrahim, Antonio Pullini, Maurizio Valle, Luca Benini:
An Energy Efficient E-Skin Embedded System for Real-Time Tactile Data Decoding. 101-109 - Mario Osta, Ali Ibrahim, Lucia Seminara, Hussein Chible, Maurizio Valle:
Low Power Approximate Multipliers for Energy Efficient Data Processing. 110-117 - Alberini Giacomo, Massimo Gottardi, Nicola Massari, Roberto Passerone:
A Low-Power Clock-Less Pulse Width Modulator Architecture for Smart Imaging. 118-128 - Ali H. Hassan, Hassan Mostafa, Yehea Ismail, Ahmed M. Soliman:
A Low-Power High-Efficiency Inductive Link Power Supply for Neural Recording and Stimulation System-on-Chip. 129-139 - Gregorio Boccalero, Corrado Boragno, Remy Morasso, Daniele D. Caviglia:
Efficiency Issues for a Wind-Driven Energy Harvesting Device. 140-147 - Christopher B. Harris, R. Iris Bahar:
Towards the Simulation Based Design and Validation of Mobile Robotic Cyber-Physical Systems. 148-156 - Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard:
An Ultra-Low Power and High Performance Single Ended Sense Amplifier for Low Voltage Flash Memories. 157-169 - Yohan Wanderoild, Adrien Morel, Armande Capitaine, Gaël Pillonnet:
A 50 μW Microbial Fuel Cell Isolated Energy Harvesting Interface Based on Air Coupled Inductors. 170-178 - Mehdi Nasrollahpour, Rahul Sreekumar, F. Hajilou, Muhammad Aldacher, Sotoudeh Hamedi-Hagh:
Low-Power Bluetooth Receiver Front End Design with Oscillator Leakage Reduction Technique. 179-184
Volume 14, Number 2, June 2018
- Patrick Girard:
A Special Section on Low Power Electronics: A Compilation of Emerging Ideas and Efficient Solutions. 185 - Mustafa Badaroglu:
Interconnect-Aware Technology and Design Co-Optimization for the 5-nm Technology and Beyond. 186-194 - Yue Zha, Jing Li:
Specialization: A New Path Towards Low Power. 195-205 - Bing-Chen Wu, Tsung-Te Liu:
Circuit Sensing Techniques in Magnetoresistive Random-Access Memory. 206-216 - Anirudh Srikant Iyengar, Swaroop Ghosh, Nitin Rathi:
Magnetic Tunnel Junction Reliability Assessment Under Process Variations and Activity Factors and Mitigation Techniques. 217-226 - Jun Shiomi, Shu Hokimoto, Tohru Ishihara, Hidetoshi Onodera:
Minimum Energy Point Tracking with All-Digital On-Chip Sensors. 227-235 - Esteve Amat, Antonio Calomarde, Ramon Canal, Antonio Rubio:
Optimization of FinFET-Based Gain Cells for Low Power Sub-V T Embedded DRAMs. 236-243 - Adrien Morel, Gaël Pillonnet, Yohan Wanderoild, Adrien Badel:
Dielectric Losses Considerations for Piezoelectric Energy Harvesting. 244-254 - Sudip Roy, Brajesh Kumar Kaushik, Sudeb Dasgupta:
Selected Articles from VDAT 2017 Conference. 255-256 - Purvi Patel, Biswajit Mishra, Dipankar Nagchoudhuri:
A 46 nW Power Management Unit with Battery Extender for Solar Energy Harvesters Using 0.18 μm CMOS. 257-265 - G. Hanumanta Rao, S. Rekha:
Low Voltage, Low Power Gm -C Filter for Low Frequency Applications. 266-274 - Khushbu Chandrakar, Sudeshna Kundu, Suchismita Roy:
Power Optimization Techniques for High-Level Designs Using Multiple Voltage Components for Low Power Consumption. 275-284 - Patanjali SLPSK, Milan Patnaik, Seetal Potluri, V. Kamakoti:
MLTimer: Leakage Power Minimization in Digital Circuits Using Machine Learning and Adaptive Lazy Timing Analysis. 285-301 - Gayathri Ananthanarayanan, Smruti R. Sarangi, M. Balakrishnan:
Task Assignment Algorithms for Multicore Platforms with Process Variations. 302-317 - Sa'ed Abed, Haya Alahmad, Maryam Safar:
Leakage/Temperature-Aware Dynamic Voltage Scaling and Dynamic Cache Reconfiguration to Reduce Power Consumption. 318-326 - Suresh Mopuri, V. Siva Ramakrishna, Amit Acharyya:
Low-Complexity and Reconfigurable Discrete Hilbert Transform Architecture Design Methodology. 327-336 - Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya:
Novel ASIC Design Flow Using Dynamic Libraries for Reducing Design Time. 337-350 - Swati Bhardwaj, Shashank Raghuraman, Bhagyaraja Adapa, Amit Acharyya:
Vector Cross Product and Coordinate Rotation Based nD Hybrid FastICA. 351-364 - Nassima Tidjani, Sébastien Bissey, Sébastien Jacques, Jean-Charles Le Bunetel:
Microstrip Filter Against the Crosstalk Effect in Planar Power Devices. 365-371
Volume 14, Number 3, September 2018
- Patrick Girard:
A Special Section on Industrial Experiences in Low Power Electronics. 373 - Bipul C. Paul, Ajey P. Jacob, William Taylor, Randy W. Mann, Joseph Versaggi, Edward J. Nowak, Lars W. Liebmann:
A Retrospective View on the Technology Evolution to Support Low Power Mobile Application. 374-392 - S. Badrudduza, G. Abeln, T. Jew, P. Grudowski, A. Roy, C. Cavins:
Automotive Reliable Memories Integrated into an Ultra-Low Power 40 nm CMOS Logic Process. 393-403 - Marc Renaudin, Aymane Bouzafour, Sylvain Engels, Robin Wilson:
A 6-Wire Plug and Play Clockless Distributed On-Chip-Sensor Network in 28 nm UTBB FD-SOI. 404-413 - Abbas A. Fairouz, Monther Abusultan, Amr Elshennawy, Sunil P. Khatri:
Comparing Leakage Reduction Techniques for an Asynchronous Network-on-Chip Router. 414-427 - José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi:
Low Swing Charge Recycling Driver for On-Chip Interconnect. 428-438 - Chi-Chia Sun, Cheng Chih Wang:
Adiabatic Logic Based Low-Power Precomputation-Based Content Addressable Memory Parameter Extractor Design. 439-447 - Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya:
Cut-less Technology Mapping Using Shannon Factor Graph with on-the-fly Size Reduction. 448-457
Volume 14, Number 4, December 2018
- Patrick Girard:
A Special Section On Machine Learning and Artificial Intelligence In Low Power Electronics. 459 - Sai Manoj P. D., Axel Jantsch, Muhammad Shafique:
SmartDPM: Machine Learning-Based Dynamic Power Management for Multi-Core Microprocessors. 460-474 - Ruofei Hu, Binren Tian, Shouyi Yin, Shaojun Wei:
Optimization of Softmax Layer in Deep Neural Network Using Integral Stochastic Computation. 475-480 - Wenyan Lu, Guihai Yan, Xiaowei Li:
AdaFlow: Aggressive Convolutional Neural Networks Approximation by Leveraging the Input Variability. 481-495 - Xiaowei Li, Jiajun Li, Guihai Yan:
Optimizing Memory Efficiency for Deep Convolutional Neural Network Accelerators. 496-507 - Adarsha Balaji, Federico Corradi, Anup Das, Sandeep Pande, Siebren Schaafsma, Francky Catthoor:
Power-Accuracy Trade-Offs for Heartbeat Classification on Neural Networks Hardware. 508-519 - Muhammad Abdullah Hanif, Alberto Marchisio, Tabasher Arif, Rehan Hafiz, Semeen Rehman, Muhammad Shafique:
X-DNNs: Systematic Cross-Layer Approximations for Energy-Efficient Deep Neural Networks. 520-534 - Zhou Zhao, Ashok Srivastava, Lu Peng, Saraju P. Mohanty:
A Multiple Input Floating Gate Based Arithmetic Logic Unit with a Feedback Loop for Digital Calibration. 535-547 - P. Sasipriya, Kanchana Bhaaskaran Vettuvanam Somasundaram:
Design and Analysis of Clocked CMOS Differential Adiabatic Logic (CCDAL) for Low Power. 548-557 - Amokrane Malou, Bruno Allard, Alaa Hijazi, Xuefang Lin-Shi:
4-Switch Buck-Boost DC-DC Converter: A Case Study. 558-581
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-12-27 21:14 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
