default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID3rd LATW 2002: Montevideo, Uruguay
- 3rd Latin American Test Workshop, LATW 2002, Montevideo, Uruguay, February 10-13, 2002. IEEE 2002
- Li-C. Wang, Magdy S. Abadir:
Validation and Verification of Complex Digital Systems: A Practical Perspective. LATW 2002: 1 - Matteo Sonza Reorda:
An Overview Covering the Different Solutions: from radiation testing to Software Fault Injection. LATW 2002: 2 - Fabian Vargas, Rubem D. R. Fagundes, Daniel Barros Jr.:
A New On-Line Robust Approach to Design Noise-Immune Speech Recognition Systems. LATW 2002: 4-10 - Leonardo L. Giovanini:
Fault-Tolerant Predictive Feedback Control. LATW 2002: 11-15 - Raul Ceretta Nunes, Ingrid Jansch-Pôrto:
Non-stationary Communication Dalays in Failure Detectors. LATW 2002: 16-21 - Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante:
A New Approach to Software-Implemented Fault Tolerance. LATW 2002: 22-25 - João-Batista Destro-Filho, M. V. Ribeiro:
A Software Technique for Fault-Tolerant Adaptive Circuits in Spatial Applications. LATW 2002: 26-31 - Inali Wisniewski Soares, Silvia Regina Vergilio:
DMutation Analysis and Constraint-Based Criteria: Results from na Empirical Evaluation in the Context of Testing Software. LATW 2002: 33-38 - Luis Carlos Erpen De Bona, Elias Procópio Duarte Jr.:
A Flexible Approach for Defining Distributed Dependable Tests in SNMP-based Network Management Systems. LATW 2002: 39-44 - Lisiane Maes Volpi, Silvia Regina Vergilio:
Software Testing in Client-Server Environments: a Strategy and its Application. LATW 2002: 45-50 - Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Luz Balado, Joan Figueras:
On High-Quality, Low Energy BIST Preparation at RT-Level. LATW 2002: 52-57 - Alexandre S. Santiago, Arthur H. C. Oliveira, Rubens Takiguti:
Built-in Self Code for Microcontroller Units. LATW 2002: 58-60 - Wang Jiang Chau, Paulo Sérgio Cardoso, Marius Strum, Ricardo Pires:
A Comparison Between Test Pattern Generation Strategies for Functional Units in BIST Applications. LATW 2002: 61-63 - Wang Jiang Chau, Jose Artur Quilici González, Marius Strum, Ricardo Pires:
BIST Plan Optimization and Independent Input Test Register Insertion for Datapath Functional Units. LATW 2002: 64-69 - Manuel G. Gericota, Gustavo R. Alves:
Dynamic Replication: The Core of a Truly Non-Intrusive SRAM-based FPGA Structural Concurrent Test Methodology. LATW 2002: 70-75 - Alex Gonsales, Marcelo Lubaszewski, Luigi Carro, Michel Renovell:
A New FPGA for DSP Applications Integrating BIST Capabilities. LATW 2002: 76-81 - José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski, Antonio Carneiro de Mesquita Filho:
Designing for Test Butterworth and Chebyshev Low-Pass Filters of Any Order. LATW 2002: 83-85 - José Vicente Calvano, Antonio Carneiro de Mesquita Filho, Marcelo Lubaszewski, Vladimir Castro Alves:
State Model Approach for Analog Fault Modeling. LATW 2002: 86-88 - Diego Vázquez, Gloria Huertas, Adoración Rueda, Gildas Léger, José L. Huertas:
Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits. LATW 2002: 89-93 - Eduardo Romero, Gabriela Peretti, Carlos A. Marqués:
Oscillation Test Strategy: a Case Study. LATW 2002: 94-98 - Vincent Beroulle, Yves Bertrand, Laurent Latorre, Pascal Nouet:
Testing Resonant Micro-Electro-Mechanical Sensors using the Oscillation-based Test Methodology. LATW 2002: 99-104 - Pablo A. Ferreyra, Carlos A. Marqués, Javier P. Gaspar, Raul Velazco, Ricardo T. Ferreyra:
SEU-Induced-Fault Detection-Efficiency of a Watch Dog Circuit for a Micro-Satellite on Board Digital Signal Processor System. LATW 2002: 106-108 - Dean Lewis, Pascal Fouillat, Vincent Pouget:
Dynamic Fault Injection in Integrated Circuits with a Pulsed Laser. LATW 2002: 109-113 - Ivan de Paúl, Miquel Roca, Oscar Calvo, Raul Velazco:
SEU fault injection in simulation environments: example of VHDL configuration on FPGA device. LATW 2002: 114-119 - Fernanda Lima, Luigi Carro, Raul Velazco, Ricardo Reis:
Injecting Multiple Upsets in a SEU tolerant 8051 Micro-controller. LATW 2002: 120-125 - Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis:
Simulating Single Event Transients in VDSM ICs for Ground Level Radiation. LATW 2002: 126-129 - Pascal Fouillat:
Laser Utilization for Various Testing Purposes. LATW 2002: 130 - Jiang Brandon Liu, Andreas G. Veneris, Magdy S. Abadir:
Efficient and Exact Diagnosis of Multiple Stuck-At Faults. LATW 2002: 132-136 - Raimund Ubar:
Testability Calculation for Digital Circuits with Decision Diagrams. LATW 2002: 137-143 - José Luís Güntzel, Gustavo Wilke, Márcio Bystronski, Ana Cristina Medina Pinto, Ricardo Reis:
A Comparison Between Testability Measures Applied to Complex Gates. LATW 2002: 144-149 - Eric Sax, J. Willibald, Klaus D. Müller-Glaser:
Seamless Testing of Embedded Control Systems. LATW 2002: 151-153 - Zahra Sadat Ebadi, André Ivanov:
Design of an Optimal Test Access Architecture under Power and Place-and-Route Constraints Using GA. LATW 2002: 154-159 - Érika F. Cota, Luigi Carro, Alex Orailoglu, Marcelo Lubaszewski:
Generic and Detailed Search for TAM Definition in Core-Based Systems. LATW 2002: 160-164 - Adão Antonio de Souza Junior, Marcelo Negreiros, Luigi Carro, Altamiro A. Suzim:
Complex Adaptive Signal Processing for Analog Testing. LATW 2002: 166-173 - Florence Azaïs, Serge Bernard, Yves Bertrand, Mariane Comte, Michel Renovell, Marcelo Lubaszewski:
Estimating Static Parameters of A-to-D Converters from Spectral Analysis. LATW 2002: 174-179 - Yolanda Lechuga, Román Mozuelos, Mar Martínez, Salvador Bracho:
Hard-to-Detect Faults by Dinamic Current Sensor in Analogue Circuits. LATW 2002: 180-185 - Zhanping Chen, Liqiong Wei, Ali Keshavarzi, Kaushik Roy:
IDDQ Testing for Deep Submicron ICs: Challenges and Solutions. LATW 2002: 186-192 - Olivier Bonnaud, Taieb Mohammed-Brahim:
Specific Tests of Thin Film Devices for Large Area Electronics. LATW 2002: 194-198 - Konstantin O. Petrosjanc, Igor A. Kharitonov, Alexej S. Adonin:
Multi-Level Testing Strategy for Radiation Hardened SOI/SOS ICs. LATW 2002: 199-204 - Antonio Zenteno, Víctor H. Champac, Jaime Ramírez-Angulo:
Behavior Analysis and Testing of Resistive Opens in the Clock Circuitry of Memory Elements. LATW 2002: 205-211 - Olivier Bonnaud:
Very Fast Reliability Test at Wafer Level Applied to a BCD Technology. LATW 2002: 212
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-01-03 23:15 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
