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ORCIDISPASS 2007: San Jose, California, USA
- 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings. IEEE Computer Society 2007, ISBN 1-4244-1081-9
- Donald Newell:
Workloads, Scalability, and QoS Considerations in CMP Platforms. - Leslie Barnes:
Performance Modeling and Analysis for AMD's High Performance Microprocessors. - Seongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer, Li Zhao, W. Cohen:
Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance. 1-11 - Andrew Over, Bill Clarke, Peter E. Strazdins:
A Comparison of Two Approaches to Parallel Simulation of Multiprocessors. 12-22 - Matt T. Yourst:
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator. 23-34 - Wenlong Li, Eric Q. Li, Aamer Jaleel, Jiulong Shan, Yurong Chen
, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du:
Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation. 35-43 - Yefim Shuf, Ian M. Steiner:
Characterizing a Complex J2EE Workload: A Comprehensive Analysis and Opportunities for Optimizations. 44-53 - Mahesh Bhat, John Crawford, Ricardo Morin, Kumar Shiv:
Performance Characterization of Decimal Arithmetic in Commercial Java Workloads. 54-61 - Mauricio Alvarez, Esther Salamí, Alex Ramírez, Mateo Valero:
Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video Codec Applications. 62-71 - Ayose Falcón, Paolo Faraboschi, Daniel Ortega:
Combining Simulation and Virtualization through Dynamic Sampling. 72-83 - Joshua L. Kihm, Samuel D. Strom, Daniel A. Connors:
Phase-Guided Small-Sample Simulation. 84-93 - Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David:
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving. 94-104 - Michael Ferdman, Babak Falsafi:
Last-Touch Correlated Data Streaming. 105-115 - ElMoustapha Ould-Ahmed-Vall, James Woodlee, Charles Yount, Kshitij A. Doshi, Seth Abraham:
Using Model Trees for Computer Architecture Performance Analysis of Software Applications. 116-125 - Xudong Shi, Feiqi Su, Jih-Kwon Peir, Ye Xia, Zhen Yang:
Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility. 126-135 - Chang-Burm Cho, Tao Li:
Using Wavelet Domain Workload Execution Characteristics to Improve Accuracy, Scalability and Robustness in Program Phase Analysis. 136-145 - Ke Meng, Frank Huebbers, Russ Joseph, Yehea I. Ismail:
Modeling and Characterizing Power Variability in Multicore Architectures. 146-157 - William Lloyd Bircher, Lizy K. John:
Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events. 158-168 - Wangyuan Zhang, Xin Fu, Tao Li, José A. B. Fortes:
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures. 169-178 - Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jaleel, Greg Hamerly, Brad Calder:
Cross Binary Simulation Points. 179-189 - Paul D. Bryan, Michel C. Rosier, Thomas M. Conte:
Reverse State Reconstruction for Sampled Microarchitectural Simulation. 190-199 - Younggyun Koh, Rob C. Knauerhase, Paul Brett, Mic Bowman, Zhihua Wen, Calton Pu:
An Analysis of Performance Interference Effects in Virtual Environments. 200-209 - Daniel Jiménez-González, Xavier Martorell, Alex Ramírez:
Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications. 210-219 - Karthikeyan Vaidyanathan, Dhabaleswar K. Panda:
Benefits of I/O Acceleration Technology (I/OAT) in Clusters. 220-229 - Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad H. Hammoud, Rami G. Melhem:
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications. 230-241 - Dhiraj D. Kalamkar, Mainak Chaudhuri, Mark A. Heinrich:
Simplifying Active Memory Clusters by Leveraging Directory Protocol Threads. 242-253
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