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ORCIDDATE 2020: Grenoble, France
- 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020. IEEE 2020, ISBN 978-3-9819263-4-7
- Koen Bertels, Aritra Sarkar
, Thomas Hubregtsen, M. Serrao, Abid A. Mouedenne, Amitabh Yadav, Anna M. Krol, Imran Ashraf:
Quantum Computer Architecture: Towards Full-Stack Quantum Accelerators. 1-6 - Brice Colombier, Nathalie Bochard, Florent Bernard, Lilian Bossuet:
Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator. 1-6 - Rui Wang, Georgios N. Selimis, Roel Maes, Sven Goossens:
Long-term Continuous Assessment of SRAM PUF and Source of Random Numbers. 7-12 - Amin Rezaei, Yuanqi Shen, Hai Zhou:
Rescuing Logic Encryption in Post-SAT Era by Locking & Obfuscation. 13-18 - Bin Lin, Jinchao Chen, Fei Xie:
Selective Concolic Testing for Hardware Trojan Detection in Behavioral SystemC Designs. 19-24 - Chris Nigh, Alex Orailoglu:
Test Pattern Superposition to Detect Hardware Trojans. 25-30 - Sandeep Krishna Thirumala, Shubham Jain, Sumeet Kumar Gupta, Anand Raghunathan:
Ternary Compute-Enabled Memory using Ferroelectric Transistors for Accelerating Deep Neural Networks. 31-36 - Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim:
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. 37-42 - Abdallah M. Felfel, Kamalika Datta, Arko Dutt, Hasita Veluri, Ahmed Zaky, Aaron Voon-Yew Thean, Mohamed M. Sabry Aly:
Quantifying the Benefits of Monolithic 3D Computing Systems Enabled by TFT and RRAM. 43-48 - Ting-Jung Chang, Zhuozhi Yao, Barry P. Rand, David Wentzlaff:
Organic-Flow: An Open-Source Organic Standard Cell Library and Process Development Kit. 49-54 - Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar:
GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits. 55-60 - Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Amine Rhouni, Hassan Aboushady, Haralampos-G. D. Stratigopoulos:
Securing Programmable Analog ICs Against Piracy. 61-66 - Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling. 67-72 - Byungmin Ahn, Taewhan Kim:
Deeper Weight Pruning without Accuracy Loss in Deep Neural Networks. 73-78 - Kwangbae Lee, Hoseung Kim, Hayun Lee, Dongkun Shin:
Flexible Group-Level Pruning of Deep Neural Networks for On-Device Machine Learning. 79-84 - Vinod Ganesan, Sanchari Sen, Pratyush Kumar, Neel Gala, Kamakoti Veezhinathan, Anand Raghunathan:
Sparsity-Aware Caches to Accelerate Deep Neural Networks. 85-90 - Song Jin, Songwei Pei, Yu Wang:
On Improving Fault Tolerance of Memristor Crossbar Based Neural Network Designs by Target Sparsifying. 91-96 - Liang Pang, Mengyun Yao, Yifan Chai:
An Efficient SRAM yield Analysis Using Scaled-Sigma Adaptive Importance Sampling. 97-102 - Michael Hefenbrock, Dennis D. Weller, Michael Beigl, Mehdi Baradaran Tahoori:
Fast and Accurate High-Sigma Failure Rate Estimation through Extended Bayesian Optimized Importance Sampling. 103-108 - Min Ye, Qiao Li, Jianqiang Nie, Tei-Wei Kuo, Chun Jason Xue:
Valid Window: A New Metric to Measure the Reliability of NAND Flash Memory. 109-114 - Yeseong Kim, Mohsen Imani, Niema Moshiri, Tajana Rosing:
GenieHD: Efficient DNA Pattern Matching Accelerator Using Hyperdimensional Computing. 115-120 - Sidharth Maheshwari, Rishad A. Shafik, Ian Wilson, Alex Yakovlev, Amit Acharyya:
REPUTE: An OpenCL based Read Mapping Tool for Embedded Genomics. 121-126 - Dayane Reis, Ann Franchesca Laguna, Michael T. Niemier, Xiaobo Sharon Hu:
A Fast and Energy Efficient Computing-in-Memory Architecture for Few-Shot Learning Applications. 127-132 - Eleonora Testa, Samantha Lubaba Noor, Odysseas Zografos, Mathias Soeken, Francky Catthoor, Azad Naeemi, Giovanni De Micheli:
Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper). 133-138 - Xifan Tang, Edouard Giacomin, Patsy Cadareanu, Ganesh Gore, Pierre-Emmanuel Gaillardon:
A RRAM-based FPGA for Energy-efficient Edge Computing. 144- - Zi Wang, Jianqi Chen, Benjamin Carrión Schäfer:
Efficient and Robust High-Level Synthesis Design Space Exploration through offline Micro-kernels Pre-characterization. 145-150 - Atefeh Mehrabi, Aninda Manocha, Benjamin C. Lee, Daniel J. Sorin:
Prospector: Synthesizing Efficient Accelerators via Statistical Learning. 151-156 - Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim:
Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. 157-162 - Markus Planner, Sabine Ott, Sebastian Albrecht, Jintin Tran, Christopher Mandla, Jan-Christoph Tenzer, Thomas Schanz, Samuel Pliego, Denis Tcherniak, Manfred Steller, Harald Jeszensky, Roland Ottensamer, Konrad R. Skup, Chris Thomas, Julian Thornhill:
ESA Athena WFI Onboard Electronics - Distributed Control and Data Processing. 163-168 - Behzad Salami, Konstantinos Parasyris, Adrián Cristal, Osman S. Unsal, Xavier Martorell, Paul Carpenter, Raúl de la Cruz, Leonardo Bautista-Gomez, Daniel A. Jiménez, Carlos Álvarez, Seyed Saber Nabavi Larimi, Sergi Madonar, Miquel Pericàs, Pedro Trancoso, Mustafa Abduljabbar, Jing Chen, Pirah Noor Soomro, Madhavan Manivannan, Micha vor dem Berge, Stefan Krupop, Frank Klawonn, Al Mekhlafi, Sigrun May, Tobias Becker, Georgi Gaydadjiev, Hans Salomonsson, Devdatt P. Dubhashi, Oron Port, Yoav Etsion, Do Le Quoc, Christof Fetzer, Martin Kaiser, Nils Kucza, Jens Hagemeyer, René Griessl, Lennart Tigges, Kevin Mika, A. Hüffmeier, Marcelo Pasin, Valerio Schiavoni, Isabelly Rocha, Christian Göttel, Pascal Felber:
LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing. 169-174 - Christos Kotselidis, Sotiris Diamantopoulos, Orestis Akrivopoulos, Viktor Rosenfeld, Katerina Doka, Hazeef Mohammed, Georgios Mylonas, Vassilis Spitadakis, Will Morgan:
Efficient Compilation and Execution of JVM-Based Data Processing Frameworks on Heterogeneous Co-Processors. 175-179 - Nagadastagiri Challapalle, Sahithi Rampalli, Makesh Chandran, Gurpreet S. Kalsi, Sreenivas Subramoney, John Sampson, Vijaykrishnan Narayanan:
PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks. 180-185 - Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Davide Rossi, Luca Benini:
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions. 186-191 - Xingbin Wang, Boyan Zhao, Rui Hou, Dan Meng:
SNA: A Siamese Network Accelerator to Exploit the Model-Level Parallelism of Hybrid Network Structure. 192-197 - Renwei Li, Junning Wu, Meng Liu, Zuding Chen, Shengang Zhou, Shanggong Feng:
HcveAcc: A High-Performance and Energy-Efficient Accelerator for Tracking Task in VSLAM System. 198-203 - Jinghao Sun, Yaoyao Chi, Tianfei Xu, Lei Cao, Nan Guan, Zhishan Guo, Wang Yi:
On the Volume Calculation for Conditional DAG Tasks: Hardness and Algorithms*. 204-209 - Simon Reder, Jürgen Becker:
WCET-aware Code Generation and Communication Optimization for Parallelizing Compilers. 210-215 - Antoine Bertout, Joël Goossens, Emmanuel Grolleau, Xavier Poczekajlo:
Template schedule construction for global real-time scheduling on unrelated multiprocessor platforms. 216-221 - Kacper Wardega, Wenchao Li:
Application-Aware Scheduling of Networked Applications over the Low-Power Wireless Bus. 222-227 - Biresh Kumar Joardar, Nitthilan Kannappan Jayakodi, Janardhan Rao Doppa, Hai Li, Partha Pratim Pande, Krishnendu Chakrabarty:
GRAMARCH: A GPU-ReRAM based Heterogeneous Architecture for Neural Image Segmentation. 228-233 - Ling Wang, Yadong Wang, Xiaohang Wang:
An Approximate Multiplane Network-on-Chip. 234-239 - Bo Wang, Jun Zhou, Weng-Fai Wong, Li-Shiuan Peh:
Shenjing: A low power reconfigurable neuromorphic accelerator with partial-sum and spike networks-on-chip. 240-245 - Michael Hersche, Philipp Rupp, Luca Benini, Abbas Rahimi:
Compressing Subject-specific Brain-Computer Interface Models into One Model by Superposition in Hyperdimensional Space. 246-251 - Konstantinos Malavazos, Maria Papadogiorgaki, Pavlos Malakonakis, Ioannis Papaefstathiou:
A novel FPGA-based system for Tumor Growth Prediction. 252-257 - Silvio Zanoli, Tomás Teijeiro, Fabio Montagna, David Atienza:
An Event-Based System for Low-Power ECG QRS Complex Detection. 258-263 - Giovanni Mezzina, Daniela De Venuto:
Semi-Autonomous Personal Care Robots Interface driven by EEG Signals Digitization. 264-269 - Nimisha Limaye, Ozgur Sinanoglu:
DynUnlock: Unlocking Scan Chains Obfuscated using Dynamic Keys. 270-273 - Ismail Cevik, Levent Aksoy, Mustafa Altun:
CMOS Implementation of Switching Lattices. 274-277 - Soheil Nazar Shahsavani, Bo Zhang, Massoud Pedram:
A Timing Uncertainty-Aware Clock Tree Topology Generation Algorithm for Single Flux Quantum Circuits. 278-281 - Antonios Pavlidis, Marie-Minerve Louërat, Eric Faehn, Anand Kumar, Haralampos-G. D. Stratigopoulos:
Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP. 282-285 - Sai Govinda Rao Nimmalapudi, Georgios Volanis, Yichuan Lu, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris:
Range-Controlled Floating-Gate Transistors: A Unified Solution for Unlocking and Calibrating Analog ICs. 286-289 - Koutaro Hachiya, Atsushi Kurokawa:
Testing Through Silicon Vias in Power Distribution Network of 3D-IC with Manufacturing Variability Cancellation. 290-293 - Filip Vaverka, Vojtech Mrazek, Zdenek Vasícek, Lukás Sekanina:
TFApprox: Towards a Fast Emulation of DNN Approximate Hardware Accelerators on GPU. 294-297 - Valentin Gherman, Samuel Evain, Bastien Giraud:
Binary Linear ECCs Optimized for Bit Inversion in Memories with Asymmetric Error Probabilities. 298-301 - Meng Zhang, Fei Wu, Qin Yu, Weihua Liu, Lanlan Cui, Yahui Zhao, Changsheng Xie:
BeLDPC: Bit Errors Aware Adaptive Rate LDPC Codes for 3D TLC NAND Flash Memory. 302-305 - Kang Liu, Benjamin Tan, Ramesh Karri, Siddharth Garg:
Poisoning the (Data) Well in ML-Based CAD: A Case Study of Hiding Lithographic Hotspots. 306-309 - Milind Srivastava, Patanjali SLPSK, Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia:
SOLOMON: An Automated Framework for Detecting Fault Attack Vulnerabilities in Hardware. 310-313 - Ipsita Koley, Saurav Kumar Ghosh, Soumyajit Dey, Debdeep Mukhopadhyay, Amogh Kashyap K. N., Sachin Kumar Singh, Lavanya Lokesh, Jithin Nalu Purakkal, Nishant Sinha:
Formal Synthesis of Monitoring and Detection Systems for Secure CPS Implementations. 314-317 - Bahar Asgari, Ramyad Hadidi, Hyesoon Kim:
ASCELLA: Accelerating Sparse Computation by Enabling Stream Accesses to Memory. 318-321 - Nimish Shah, Laura Isabel Galindez Olascoaga, Wannes Meert, Marian Verhelst:
Acceleration of probabilistic reasoning through custom processor architecture. 322-325 - Shayan Tabatabaei Nikkhah, Marc Geilen, Dip Goswami, Kees Goossens:
A Performance Analysis Framework for Real-Time Systems Sharing Multiple Resources. 326-329 - Maximilien Dupont de Dinechin, Matheus Schuh, Matthieu Moy, Claire Maiza:
Scaling Up the Memory Interference Analysis for Hard Real-Time Many-Core Systems. 330-333 - Subodha Charles, Megan Logan, Prabhat Mishra:
Lightweight Anonymous Routing in NoC based SoCs. 334-337 - Markus Reichmuth, Simone Schürle, Michele Magno:
A Non-invasive Wearable Bioimpedance System to Wirelessly Monitor Bladder Filling. 338-341 - Michele Magno, Xiaying Wang, Manuel Eggimann, Lukas Cavigelli, Luca Benini:
InfiniWolf: Energy Efficient Smart Bracelet for Edge Computing with Dual Source Energy Harvesting. 342-345 - Ahmet Can Mert, Emre Karabulut, Erdinç Öztürk, Erkay Savas, Michela Becchi, Aydin Aysu:
A Flexible and Scalable NTT Hardware : Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography. 346-351 - Jeong-Hyeon Kim, Ho-Jun Jo, Kyung-Kuk Jo, Sung-Hee Cho, Jaeyong Chung, Joon-Sung Yang:
Reliable and Lightweight PUF-based Key Generation using Various Index Voting Architecture. 352-357 - Zhiqian Chen, Gaurav Kolhe, Setareh Rafatirad, Chang-Tien Lu, Sai Manoj P. D., Houman Homayoun, Liang Zhao:
Estimating the Circuit De-obfuscation Runtime based on Graph Deep Learning. 358-363 - Johannes Feldmann, Kira Kraft, Lukas Steiner, Norbert Wehn, Matthias Jung:
Fast and Accurate DRAM Simulation: Can we Further Accelerate it? 364-369 - Breytner Fernández-Mesa, Liliana Andrade, Frédéric Pétrot:
Accurate and Efficient Continuous Time and Discrete Events Simulation in SystemC. 370-375 - Fei Gao, Frédéric Mallet, Min Zhang, Mingsong Chen:
Modeling and Verifying Uncertainty-Aware Timing Behaviors using Parametric Logical Time Constraint. 376-381 - Mustafa Altun, Ismail Cevik, Ahmet Erten, Osman Eksik, Mircea Stan, Csaba Andras Moritz:
Nano-Crossbar based Computing: Lessons Learned and Future Directions. 382-387 - Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka:
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. 388-393 - Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat:
A Universal Spintronic Technology based on Multifunctional Standardized Stack. 394-399 - Zihao Yuan, Geoffrey Vaartstra, Prachi Shukla, Zhengmao Lu, Evelyn Wang, Sherief Reda, Ayse K. Coskun:
A Learning-Based Thermal Simulation Framework for Emerging Two-Phase Cooling Technologies. 400-405 - Mengquan Li, Jun Zhou, Weichen Liu:
Lightweight Thermal Monitoring in Optical Networks-on-Chip via Router Reuse. 406-411 - Zhiqiang Zhao, Zhuo Feng:
A Spectral Approach to Scalable Vectorless Thermal Integrity Verification. 412-417 - Arman Iranfar, Federico Terraneo, Gabor Csordas, Marina Zapater, William Fornaciari, David Atienza:
Dynamic Thermal Management with Proactive Fan Speed Control Through Reinforcement Learning. 418-423 - Linwei Niu, Dakai Zhu:
Reliable and Energy-Aware Fixed-Priority (m, k)-Deadlines Enforcement with Standby-Sparing. 424-429 - Monowar Hasan, Sibin Mohan, Rodolfo Pellizzoni, Rakesh B. Bobba:
Period Adaptation for Continuous Security Monitoring in Multicore Real-Time Systems. 430-435 - Jiankang Ren, Xin He, Junlong Zhou, Hongwei Ge, Guowei Wu, Guozhen Tan:
Efficient Latency Bound Analysis for Data Chains of Real-Time Tasks in Multiprocessor Systems. 436-441 - Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar:
Cache Persistence-Aware Memory Bus Contention Analysis for Multicore Systems. 442-447 - Rajit Karmakar, Santanu Chattopadhyay:
A Particle Swarm Optimization Guided Approximate Key Search Attack on Logic Locking in The Absence of Scan Access. 448-453 - Trevor Kroeger, Wei Cheng, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi:
Effect of Aging on PUF Modeling Attacks based on Power Side-Channel Observations. 454-459 - Sebastian P. Bayerl, Tommaso Frassetto, Patrick Jauernig, Korbinian Riedhammer, Ahmad-Reza Sadeghi, Thomas Schneider, Emmanuel Stapf, Christian Weinert:
Offline Model Guard: Secure and Private ML on Mobile Devices. 460-465 - Minhui Zou, Zhenhua Zhu, Yi Cai, Junlong Zhou, Chengliang Wang, Yu Wang:
Security Enhancement for RRAM Computing System through Obfuscating Crossbar Row Connections. 466-471 - Loai Danial, Vasu Gupta, Evgeny Pikhay, Yakov Roizin, Shahar Kvatinsky:
Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing. 472-477 - Naveen Kumar Katam, Bo Zhang, Massoud Pedram:
Ground Plane Partitioning for Current Recycling of Superconducting Circuits. 478-483 - Asif Mirza, Febin Sunny, Sudeep Pasricha, Mahdi Nikdast:
Silicon Photonic Microring Resonators: Design Optimization Under Fabrication Non-Uniformity. 484-489 - Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Kourosh Hakhamaneshi, Borivoje Nikolic:
AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs. 490-495 - Mingjie Liu, Keren Zhu, Jiaqi Gu, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan:
Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning. 496-501 - Zhiyuan Zhou, Syrine Belakaria, Aryan Deshwal, Wookpyo Hong, Janardhan Rao Doppa, Partha Pratim Pande, Deukhyoun Heo:
Design of Multi-Output Switched-Capacitor Voltage Regulator via Machine Learning. 502-507 - Johann Knechtel, Elif Bilge Kavun, Francesco Regazzoni, Annelie Heuser, Anupam Chattopadhyay, Debdeep Mukhopadhyay, Soumyajit Dey, Yunsi Fei, Yaacov Belenky, Itamar Levi, Tim Güneysu, Patrick Schaumont, Ilia Polian:
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. 508-513 - Fatemeh Ganji, Sarah Amir, Shahin Tajik, Domenic Forte, Jean-Pierre Seifert:
Pitfalls in Machine Learning-based Adversary Modeling for Hardware Systems. 514-519 - Ran Canetti, Marten van Dijk, Hoda Maleki, Ulrich Rührmair, Patrick Schaumont:
Using Universal Composition to Design and Analyze Secure Complex Hardware Systems. 520-525 - Keerthikumara Devarajegowda, Mohammad Rahmani Fadiheh, Eshan Singh, Clark W. Barrett, Subhasish Mitra, Wolfgang Ecker, Dominik Stoffel, Wolfgang Kunz:
Gap-free Processor Verification by S2QED and Property Generation. 526-531 - Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski:
SPEAR: Hardware-based Implicit Rewriting for Square-root Circuit Verification. 532-537 - Nícolas Pfeifer, Bruno V. Zimpel, Gabriel A. G. Andrade, Luiz C. V. dos Santos:
A Reinforcement Learning Approach to Directed Test Generation for Shared Memory Verification. 538-543 - Alireza Mahzoon, Daniel Große, Christoph Scholl, Rolf Drechsler:
Towards Formal Verification of Optimized and Industrial Multipliers. 544-549 - Chandan Karfa, Ramanuj Chouksey, Christian Pilato, Siddharth Garg, Ramesh Karri:
Is Register Transfer Level Locking Secure? 550-555 - Valentina Richthammer, Marcel Rieß, Julian Bestler, Frank Slomka, Michael Glaß:
Design Space Exploration for Model-based Communication Systems. 556-561 - Nadir Amin Carreon, Allison Gilbreath, Roman Lysecky:
Statistical Time-based Intrusion Detection in Embedded Systems. 562-567 - Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli:
A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. 568-573 - Huimei Cheng, Xi Li, Yichen Gu, Peter A. Beerel:
Saving Power by Converting Flip-Flop to 3-Phase Latch-Based Designs. 574-579 - Anna Bernasconi, Valentina Ciriani, Jordi Cortadella, Tiziano Villa:
Computing the full quotient in bi-decomposition by approximation. 580-585 - Xinghai Zhang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Wenzhong Guo, Ting-Chi Wang:
MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes. 586-591 - Timothy J. Baker, John P. Hayes:
The Hypergeometric Distribution as a More Accurate Model for Stochastic Computing. 592-597 - Kuncai Zhong, Weikang Qian:
Accuracy Analysis for Stochastic Circuits with D Flip-Flop Insertion. 598-603 - Siting Liu, Jie Han:
Dynamic Stochastic Computing for Digital Signal Processing Applications. 604-609 - Michael X. Lyons, Kris Gaj:
Sampling from Discrete Distributions in Combinational Hardware with Application to Post-Quantum Cryptography. 610-613 - Amir Alipour, Athanasios Papadimitriou, Vincent Beroulle, Ehsan Aerabi, David Hély:
On the Performance of Non-Profiled Differential Deep Learning Attacks against an AES Encryption Algorithm Protected using a Correlated Noise Generation based Hiding Countermeasure. 614-617 - Vladimir Herdt, Daniel Große, Rolf Drechsler:
Fast and Accurate Performance Evaluation for RISC-V using Virtual Prototypes*. 618-621 - Shiyu Zhang, Juan Zhai, Lei Bu, Mingsong Chen, Linzhang Wang, Xuandong Li:
Automated Generation of LTL Specifications For Smart Home IoT Using Natural Language. 622-625 - Hao Feng, Yuhui Deng, Yi Zhou:
A Heat-Recirculation-Aware VM Placement Strategy for Data Centers. 626-629 - Sami Salamin, Martin Rapp, Hussam Amrouch, Andreas Gerstlauer, Jörg Henkel:
Energy Optimization in NCFET-based Processors. 630-633 - Soulimane Kamni, Yassine Ouhammou, Antoine Bertout, Emmanuel Grolleau:
Towards a Model-based Multi-Objective Optimization Approach For Safety-Critical Real-Time Systems. 634-637 - Shengqi Yu, Ahmed Soltan, Rishad A. Shafik, Thanasin Bunnam, Fei Xia, Domenico Balsamo, Alex Yakovlev:
Current-Mode Carry-Free Multiplier Design using a Memristor-Transistor Crossbar Architecture. 638-641 - Abdulqader Nael Mahmoud, Frederic Vanderveken, Florin Ciubotaru, Christoph Adelmann, Sorin Cotofana, Said Hamdioui:
n-bit Data Parallel Spin Wave Logic Gate. 642-645 - Ginés Doménech-Asensi, Tom J. Kazmierski:
High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors. 646-649 - Shitij Avlani, Mayukh Nath, Shovan Maity, Shreyas Sen:
A 100KHz-1GHz Termination-dependent Human Body Communication Channel Measurement using Miniaturized Wearable Devices. 650-653 - Daniela Kaufmann, Armin Biere, Manuel Kauers:
From DRUP to PAC and Back. 654-657 - William L. Harrison, Gerard Allwein:
Verifiable Security Templates for Hardware. 658-661 - Dimitrios Tychalas, Michail Maniatakos:
IFFSET: In-Field Fuzzing of Industrial Control Systems using System Emulation. 662-665 - Mahum Naseer, Mishal Fatima Minhas, Faiq Khalid, Muhammad Abdullah Hanif, Osman Hasan, Muhammad Shafique:
FANNet: Formal Analysis of Noise Tolerance, Training Bias and Input Sensitivity in Neural Networks. 666-669 - Max Austin, Scott Temple, Walter Lau Neto, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon:
A Scalable Mixed Synthesis Framework for Heterogeneous Networks. 670-673 - Shubham Rai, Michael Raitza, Siva Satyendra Sahoo, Akash Kumar:
DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies. 674-677 - Qian Chen, Yuqi Su, Hyunjoon Kim, Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim:
A 16×128 Stochastic-Binary Processing Element Array for Accelerating Stochastic Dot-Product Computation Using 1-16 Bit-Stream Length. 678-681 - Arighna Deb, Gerhard W. Dueck, Robert Wille:
Towards Exploring the Potential of Alternative Quantum Computing Architectures. 682-685 - Mahabubul Alam, Abdullah Ash-Saki, Swaroop Ghosh:
Accelerating Quantum Approximate Optimization Algorithm using Machine Learning. 686-689 - Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz:
In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. 690-695 - Mohammad Bavandpour, Shubham Sahay, Mohammad Reza Mahmoodi, Dmitri B. Strukov:
Mixed-Signal Vector-by-Matrix Multiplier Circuits Based on 3D-NAND Memories for Neurocomputing. 696-701 - Mengya Lei, Fang Wang, Dan Feng, Fan Li, Jie Xu:
An Efficient Persistency and Recovery Mechanism for SGX-style Integrity Tree in Secure NVM. 702-707 - Kaixin Huang, Yan Yan, Linpeng Huang:
Revisiting Persistent Hash Table Design for Commercial Non-Volatile Memory. 708-713 - Chaoshu Yang, Duo Liu, Runyu Zhang, Xianzhang Chen, Shun Nie, Qingfeng Zhuge, Edwin H.-M. Sha:
Optimizing Performance of Persistent Memory File Systems using Virtual Superpages. 714-719 - Xiaofei Xu, Zhigang Cai, Jianwei Liao, Yutaka Ishikawa:
Frequent Access Pattern-based Prefetching Inside of Solid-State Drives. 720-725 - Jie-Hong R. Jiang, Victor N. Kravets, Nian-Ze Lee:
Engineering Change Order for Combinational and Sequential Design Rectification. 726-731 - Heinz Riener, Alan Mishchenko, Mathias Soeken:
Exact DAG-Aware Rewriting. 732-737 - Victor N. Kravets, Jie-Hong R. Jiang, Heinz Riener:
Learning to Automate the Design Updates From Observed Engineering Changes in the Chip Development Cycle. 738-743 - Masahiro Fujita, Yusuke Kimura, Xingming Le, Yukio Miyasaka, Amir Masoud Gharehbaghi:
Synthesis and Optimization of Multiple Portions of Circuits for ECO based on Set-Covering and QBF Formulations. 744-749 - Zhan Zhang, Jianhui Yue, Xiaofei Liao, Hai Jin:
Efficient Hardware-Assisted Crash Consistency in Encrypted Persistent Memory. 750-755 - Amin Ghasemazar, Mohammad Ewais, Prashant J. Nair, Mieszko Lis:
2DCC: Cache Compression in Two Dimensions. 756-761 - Leul Belayneh, Valeria Bertacco:
GraphVine: Exploiting Multicast for Scalable Graph Analytics. 762-767 - Wojciech Romaszkan, Tianmu Li, Tristan Melton, Sudhakar Pamarti, Puneet Gupta:
ACOUSTIC: Accelerating Convolutional Neural Networks through Or-Unipolar Skipped Stochastic Computing. 768-773 - Xiang-Xiu Wu, Yi-Wen Hung, Yung-Chih Chen, Shih-Chieh Chang:
Accuracy Tolerant Neural Networks Under Aggressive Power Optimization. 774-779 - Ya-Chun Chang, Chia-Chun Lin, Yi-Ting Lin, Yung-Chih Chen, Chun-Yao Wang:
A Convolutional Result Sharing Approach for Binarized Neural Network Inference. 780-785 - Gang Chen, Shengyu He, Haitao Meng, Kai Huang:
PhoneBit: Efficient GPU-Accelerated Binary Neural Network Inference Engine for Mobile Phones. 786-791 - Guilherme Cardoso Medeiros, Cemil Cem Gürsoy, Lizhou Wu, Moritz Fieback, Maksim Jenihhin, Mottaqiallah Taouil, Said Hamdioui:
A DFT Scheme to Improve Coverage of Hard-to-Detect Faults in FinFET SRAMs. 792-797 - Sebastian Brandhofer, Michael A. Kochte, Hans-Joachim Wunderlich:
Synthesis of Fault-Tolerant Reconfigurable Scan Networks. 798-803 - Chang Liu, Eric Schneider, Hans-Joachim Wunderlich:
Using Programmable Delay Monitors for Wear-Out and Early Life Failure Prediction. 804-809 - Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio:
Maximizing Yield for Approximate Integrated Circuits. 810-815 - Sara Vinco, Yukai Chen, Enrico Macii, Massimo Poncino:
A Diode-Aware Model of PV Modules from Datasheet Specifications. 816-821 - Christian Menard, Andrés Goens, Marten Lohstroh, Jerónimo Castrillón:
Achieving Determinism in Adaptive AUTOSAR. 822-827 - Sebastian vom Dorff, Bert Böddeker, Maximilian Kneißl, Martin Fränzle:
A Fail-safe Architecture for Automated Driving. 828-833 - Sebastian Schwitalla, Lea Schönberger, Jian-Jia Chen:
Priority-Preserving Optimization of Status Quo ID-Assignments in Controller Area Network. 834-839 - Orlando Moreira, Amirreza Yousefzadeh, Fabian Chersi, Gokturk Cinserin, Rik-Jan Zwartenkot, Ajay Kapoor, Peng Qiao, Peter Kievits, Mina A. Khoei, Louis Rouillard, Aimee Ferouge, Jonathan Tapson, Ashoka Visweswara:
NeuronFlow: a neuromorphic processor architecture for Live AI applications. 840-845 - Ankita Nayak, Keyi Zhang, Rajsekhar Setaluri, Alex Carsello, Makai Mann, Stephen Richardson, Rick Bahr, Pat Hanrahan, Mark Horowitz, Priyanka Raina:
A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs. 846-851 - Marco Bacis, Rolando Brondolin, Marco D. Santambrogio:
BlastFunction: an FPGA-as-a-Service system for Accelerated Serverless Computing. 852-857 - Seongsik Park, Jongwan Kim, Sungroh Yoon:
Energy-aware Placement for SRAM-NVM Hybrid FPGAs. 858-863 - Carmen G. Almudéver, Lingling Lao, Robert Wille, Gian Giacomo Guerreschi:
Realizing Quantum Algorithms on Real Quantum Computing Devices. 864-872 - Martin Ring, Fritjof Bornebusch, Christoph Lüth, Robert Wille, Rolf Drechsler:
Verification Runtime Analysis: Get the Most Out of Partial Verification. 873-878 - Eric Schneider, Hans-Joachim Wunderlich:
GPU-accelerated Time Simulation of Systems with Adaptive Voltage and Frequency Scaling. 879-884 - Daniel Mendoza, Zhongqi Cheng, Emad Malekzadeh Arasteh, Rainer Dömer:
Lazy Event Prediction using Defining Trees and Schedule Bypass for Out-of-Order PDES. 885-890 - Yi-An Chen, Gung-Yu Pan, Che-Hua Shih, Yen-Chin Liao, Chia-Chih Yen, Hsie-Chia Chang:
Embedding Hierarchical Signal to Siamese Network for Fast Name Rectification. 891-896 - Konstantinos Iliakis, Sotirios Xydis, Dimitrios Soudris:
Resource-Aware MapReduce Runtime for Multi/Many-core Architectures. 897-902 - Adrian Munera, Sara Royuela, Eduardo Quiñones:
Towards a Qualifiable OpenMP Framework for Embedded Systems. 903-908 - Robert Khasanov, Jerónimo Castrillón:
Energy-efficient Runtime Resource Management for Adaptable Multi-application Mapping. 909-914 - Danilo Sijacic, Josep Balasch, Ingrid Verbauwhede:
Sweeping for Leakage in Masked Circuit Layouts. 915-920 - Philipp Miedl, Bruno Klopott, Lothar Thiele:
Increased reproducibility and comparability of data leak evaluations using ExOT. 921-926 - Simon Rokicki:
GhostBusters: Mitigating Spectre Attacks on a DBT-Based Processor. 927-932 - Sarath Mohanachandran Nair, Rajendra Bishnoi, Arunkumar Vijayan, Mehdi Baradaran Tahoori:
Dynamic Faults based Hardware Trojan Design in STT-MRAM. 933-938 - Emmanouil Kalligeros, Nikolaos Karousos, Irene G. Karybali:
Oracle-based Logic Locking Attacks: Protect the Oracle Not Only the Netlist. 939-944 - Jung-Eun Kim, Richard M. Bradford, Zhong Shao:
AnytimeNet: Controlling Time-Quality Tradeoffs in Deep Neural Network Architectures. 945-950 - Fuxun Yu, Chenchen Liu, Di Wang, Yanzhi Wang, Xiang Chen:
AntiDote: Attention-based Dynamic Optimization for Neural Network Runtime Efficiency. 951-956 - Fedor Smirnov, Behnaz Pourmohseni, Jürgen Teich:
Using Learning Classifier Systems for the DSE of Adaptive Embedded Systems. 957-962 - Dawen Xu, Kexin Chu, Cheng Liu, Ying Wang, Lei Zhang, Huawei Li:
CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding. 963-966 - Jeckson Dellagostin Souza, Madhavan Manivannan, Miquel Pericàs, Antonio Carlos Schneider Beck:
Enhancing Multithreaded Performance of Asymmetric Multicores with SIMD Offloading. 967-970 - Gang Li, Peisong Wang, Zejian Liu, Cong Leng, Jian Cheng:
Hardware Acceleration of CNN with One-Hot Quantization of Weights and Activations. 971-974 - Giorgia Fiscaletti, Marco Speziali, Luca Stornaiuolo, Marco D. Santambrogio, Donatella Sciuto:
BNNsplit: Binarized Neural Networks for embedded distributed FPGA-based computing systems. 975-978 - Salim Ullah, Siddharth Gupta, Kapil Ahuja, Aruna Tiwari, Akash Kumar:
L2L: A Highly Accurate Log_2_Lead Quantization of Pre-trained Neural Networks. 979-982 - Ryutaro Doi, Xu Bai, Toshitsugu Sakamoto, Masanori Hashimoto:
Fault Diagnosis of Via-Switch Crossbar in Non-volatile FPGA. 983-986 - Dakshina Dasari, Michael Pressler, Arne Hamann, Dirk Ziegenbein, Paul Austin:
Applying Reservation-based Scheduling to a μC-based Hypervisor: An industrial case study. 987-990 - Nitin Shivaraman, Seima Saki, Zhiwei Liu, Saravanan Ramanathan, Arvind Easwaran, Sebastian Steinhorst:
Real-Time Energy Monitoring in IoT-enabled Mobile Devices. 991-994 - Vladimir Herdt, Daniel Große, Rolf Drechsler:
Towards Specification and Testing of RISC-V ISA Compliance⋆. 995-998 - Tom Kolan, Hillel Mendelson, Vitali Sokhin, Kevin Reick, Elena Tsanko, Greg Wetli:
Post-Silicon Validation of the IBM POWER9 Processor. 999-1002 - Stefano Aldegheri, Nicola Bombieri, Hiren D. Patel:
On the Task Mapping and Scheduling for DAG-based Embedded Vision Applications on Heterogeneous Multi/Many-core Architectures. 1003-1006 - Ognjen Glamocanin, Louis Coulon, Francesco Regazzoni, Mirjana Stojilovic:
Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks? 1007-1010 - Michael H. Ostertag, Sara A. Al-Doweesh, Tajana Rosing:
Efficient Training on Edge Devices Using Online Quantization. 1011-1014 - Sota Sawaguchi, Jean-Frédéric Christmann, Anca Molnos, Carolynn Bernier, Suzanne Lesecq:
Multi-Agent Actor-Critic Method for Joint Duty-Cycle and Transmission Power Control. 1015-1018 - Shruti R. Kulkarni, Shihui Yin, Jae-sun Seo, Bipin Rajendran:
An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays. 1019-1024 - Shanshi Huang, Xiaoyu Sun, Xiaochen Peng, Hongwu Jiang, Shimeng Yu:
Overcoming Challenges for Achieving High in-situ Training Accuracy with Emerging Memories. 1025-1030 - Yangdi Lyu, Prabhat Mishra:
Automated Test Generation for Trojan Detection using Delay-based Side Channel Analysis. 1031-1036 - Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song, Krishnendu Chakrabarty, Ramesh Karri:
Microfluidic Trojan Design in Flow-based Biochips. 1037-1042 - Safouane Noubir, Maria Mendez Real, Sébastien Pillement:
Towards Malicious Exploitation of Energy Management Mechanisms. 1043-1048 - Davide Giri, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca P. Carloni:
ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning. 1049-1054 - Zixuan Yin, Warren J. Gross, Brett H. Meyer:
Probabilistic Sequential Multi-Objective Optimization of Convolutional Neural Networks. 1055-1060 - Lihua Yang, Fang Wang, Zhipeng Tan, Dan Feng, Jiaxing Qian, Shiyun Tu:
ARS: Reducing F2FS Fragmentation for Smartphones using Decision Trees. 1061-1066 - Rohit Prasad, Satyajit Das, Kevin J. M. Martin, Giuseppe Tagliavini, Philippe Coussy, Luca Benini, Davide Rossi:
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE. 1067-1072 - Shan Shen, Tianxiang Shao, Ming Ling, Jun Yang, Longxing Shi:
Modeling and Designing of a PVT Auto-tracking Timing-speculative SRAM. 1073-1078 - Chris Yakopcic, Nayim Rahman, Tanvir Atahary, Tarek M. Taha, Scott Douglass:
Solving Constraint Satisfaction Problems Using the Loihi Spiking Neuromorphic Processor. 1079-1084 - Jinwei Zhang, Sheriff Sadiqbatcha, Wentian Jin, Sheldon X.-D. Tan:
Accurate Power Density Map Estimation for Commercial Multi-Core Microprocessors. 1085-1090 - Yesung Kang, Yoonho Park, Sunghoon Kim, Eunji Kwon, Taeho Lim, Sangyun Oh, Mingyu Woo, Seokhyeong Kang:
Analysis and Solution of CNN Accuracy Reduction over Channel Loop Tiling. 1091-1096 - Fuxun Yu, Zhuwei Qin, Di Wang, Ping Xu, Chenchen Liu, Zhi Tian, Xiang Chen:
DC-CNN: Computational Flow Redefinition for Efficient CNN through Structural Decoupling. 1097-1102 - Jung-Eun Kim, Richard M. Bradford, Man-Ki Yoon, Zhong Shao:
ABC: Abstract prediction Before Concreteness. 1103-1108 - Xin Yang, Partha S. Roop, Hammond A. Pearce, Jin Woo Ro:
A compositional approach using Keras for neural networks in real-time systems. 1109-1114 - Athanasios Chatzidimitriou, Dimitris Gizopoulos:
rACE: Reverse-Order Processor Reliability Analysis. 1115-1120 - Ioannis Tsiokanos, Lev Mukhanov, Giorgis Georgakoudis, Dimitrios S. Nikolopoulos, Georgios Karakonstantis:
DEFCON: Generating and Detecting Failure-prone Instruction Sequences via Stochastic Search. 1121-1126 - Xiaohui Wei, Hengshan Yue, Jingweijia Tan:
LAD-ECC: Energy-Efficient ECC Mechanism for GPGPUs Register File. 1127-1132 - Mingye Song, Ming Yang, Wenjian Yu:
Floating Random Walk Based Capacitance Solver for VLSI Structures with Non-Stratified Dielectrics. 1133-1138 - Vincent Aravantinos, Peter Schlicht:
Making the Relationship between Uncertainty Estimation and Safety Less Uncertain. 1139-1144 - Minghua Shen, Nong Xiao:
Towards Serial-Equivalent Multi-Core Parallel Routing for FPGAs. 1139-1144 - Hua Xiang, Gi-Joon Nam, Gustavo E. Téllez, Shyam Ramji, Xiaoqing Xu:
Self-Aligned Double-Patterning Aware Legalization. 1145-1150 - Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu:
Explainable DRC Hotspot Prediction with Random Forest and SHAP Tree Explainer. 1151-1156 - Naim Ben-Hamida, Ahmad Abdo, Xueyang Li, Md Samiul Alam, Mahdi Parvizi, Claude D'Amours, David V. Plant:
Study on the Compensation of Silicon Photonics-Based Modulators in DCI Applications. 1157-1162 - Trent Weiss, Madhur Behl:
DeepRacing: A Framework for Autonomous Racing. 1163-1168 - Philipp Weiss, Andreas Weichslgartner, Felix Reimann, Sebastian Steinhorst:
Fail-Operational Automotive Software Design Using Agent-Based Graceful Degradation. 1169-1174 - Tjerk Bijlsma, Andrii Buriachevskyi, Alessandro Frigerio, Yuting Fu, Kees Goossens, Ali Osman Örs, Pieter J. van der Perk, Andrei Sergeevich Terechko, Bart Vermeulen:
A Distributed Safety Mechanism using Middleware and Hypervisors for Autonomous Vehicles. 1175-1180 - Kamalika Datta, Arko Dutt, Ahmed Zaky, Umesh Chand, Devendra Singh, Yida Li, Jackson Chun-Yang Huang, Aaron Thean, Mohamed M. Sabry Aly:
Fledge: Flexible Edge Platforms Enabled by In-memory Computing. 1181-1186 - Jean-Philippe Noël, Valentin Egloff, Maha Kooli, Roman Gauchi, Jean-Michel Portal, Henri-Pierre Charles, Pascal Vivet, Bastien Giraud:
Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. 1187-1192 - Cecilia De la Parra, Andre Guntoro, Akash Kumar:
ProxSim: GPU-based Simulation Framework for Cross-Layer Approximate DNN Optimization. 1193-1198 - Boyeal Kim, Sang Hyun Lee, Hyun Kim, Duy Thanh Nguyen, Minh-Son Le, Ik Joon Chang, Dohun Kwon, Jin Hyeok Yoo, Jun Won Choi, Hyuk-Jae Lee:
PCM: Precision-Controlled Memory System for Energy Efficient Deep Neural Network Training. 1199-1204 - Alberto Marchisio, Vojtech Mrazek, Muhammad Abdullah Hanif, Muhammad Shafique:
ReD-CaNe: A Systematic Methodology for Resilience Analysis and Design of Capsule Networks under Approximations. 1205-1210 - Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui:
Impact of Magnetic Coupling and Density on STT-MRAM Performance. 1211-1216 - Haotian Wang, Wang Kang, Liuyang Zhang, He Zhang, Brajesh Kumar Kaushik, Weisheng Zhao:
High-Density, Low-Power Voltage-Control Spin Orbit Torque Memory with Synchronous Two-Step Write and Symmetric Read Techniques. 1217-1222 - Hongtao Zhong, Mingyang Gu, Juejian Wu, Huazhong Yang, Xueqing Li:
Design of Almost-Nonvolatile Embedded DRAM Using Nanoelectromechanical Relay Devices. 1223-1228 - Mohammad Hashem Haghbayan, Antonio Miele, Zhuo Zou, Hannu Tenhunen, Juha Plosila:
Thermal-Cycling-aware Dynamic Reliability Management in Many-Core System-on-Chip. 1229-1234 - Andrea Floridia, Tzamn Melendez Carmona, Davide Piumatti, Annachiara Ruospo, Ernesto Sánchez, Sergio de Luca, Rosario Martorana, Mose Alessandro Pernice:
Deterministic Cache-based Execution of On-line Self-Test Routines in Multi-core Automotive System-on-Chips. 1235-1240 - Le Ha Hoang, Muhammad Abdullah Hanif, Muhammad Shafique:
FT-ClipAct: Resilience Analysis of Deep Neural Networks and Improving their Fault Tolerance using Clipped Activation. 1241-1246 - Wei Fan, Yujie Zhang, Weining Song, Mengying Zhao, Zhaoyan Shen, Zhiping Jia:
Q-learning Based Backup for Energy Harvesting Powered Embedded Systems. 1247-1252 - Mohammad Mehdi Sharifi, Ramin Rajaei, Patsy Cadareanu, Pierre-Emmanuel Gaillardon, Yier Jin, Michael T. Niemier, Xiaobo Sharon Hu:
A Novel TIGFET-based DFF Design for Improved Resilience to Power Side-Channel Attacks. 1253-1258 - Emad A. Ibrahim, Marc Geilen, Jos Huisken, Min Li, José Pineda de Gyvez:
Low Complexity Multi-directional In-Air Ultrasonic Gesture Recognition Using a TCN. 1259-1264 - Shaahin Angizi, Jiao Sun, Wei Zhang, Deliang Fan:
PIM-Aligner: A Processing-in-MRAM Platform for Biological Sequence Alignment. 1265-1270 - Jiaqi Zhang, Ying Zhang, Huawei Li, Jianhui Jiang:
HIT: A Hidden Instruction Trojan Model for Processors. 1271-1274 - Michail Moraitis, Elena Dubrova:
Bitstream Modification Attack on SNOW 3G. 1275-1278 - Yu Zhang, Ke Zhou, Ping Huang, Hua Wang, Jianying Hu, Yangtao Wang, Yongguang Ji, Bin Cheng:
A Machine Learning Based Write Policy for SSD Cache in Cloud Block Storage. 1279-1282 - Weiwei Chen, Ying Wang, Shuang Yang, Chen Liu, Lei Zhang:
You Only Search Once: A Fast Automation Framework for Single-Stage DNN/Accelerator Co-design. 1283-1286 - Yawen Zhang, Sheng Lin, Runsheng Wang, Yanzhi Wang, Yuan Wang, Weikang Qian, Ru Huang:
When Sorting Network Meets Parallel Bitstreams: A Fault-Tolerant Parallel Ternary Neural Network Accelerator based on Stochastic Computing. 1287-1290 - Yehuda Kra, Tzachi Noy, Adam Teman:
WavePro: Clock-less Wave-Propagated Pipeline Compiler for Low-Power and High-Throughput Computation. 1291-1294 - Ahmet Fatih Inci, Mehmet Meric Isgenc, Diana Marculescu:
DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications. 1295-1298 - Luca Cerina, Marco D. Santambrogio, Giuseppe Franco, Claudio Gallicchio, Alessio Micheli:
Efficient Embedded Machine Learning applications using Echo State Networks. 1299-1302 - Anirban Chakraborty, Sarani Bhattacharya, Sayandeep Saha, Debdeep Mukhopadhyay:
ExplFrame: Exploiting Page Frame Cache for Fault Analysis of Block Ciphers. 1303-1306 - Chi-Hsien Pao, An-Yu Su, Yu-Min Lee:
XGBIR: An XGBoost-based IR Drop Predictor for Power Delivery Network. 1307-1310 - Jyun-Ru Jiang, Yun-Chih Kuo, Simon Yi-Hung Chen, Hung-Ming Chen:
On Pre-Assignment Route Prototyping for Irregular Bumps on BGA Packages. 1311-1314 - Weiwei Chen, Ying Wang, Shuang Yang, Chen Liu, Lei Zhang:
Towards Best-effort Approximation: Applying NAS to General-purpose Approximate Computing. 1315-1318 - Etienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio:
On the Automatic Exploration of Weight Sharing for Deep Neural Network Compression. 1319-1322 - Neelam Surana, Mili Lavania, Abhishek Barma, Joycee Mekie:
Robust and High-Performance 12-T Interlocked SRAM for In-Memory Computing. 1323-1326 - Piyush Jain, Akshay Kumar, Nicolaas Van Winkelhoff, Didier Gayraud, Surya Gupta, Abdelali El Amraoui, Giorgio Palma, Alexandra Gourio, Laurent Vachez, Luc Palau, Jean-Christophe Buy, Cyrille Dray:
High Density STT-MRAM compiler design, validation and characterization methodology in 28nm FDSOI technology. 1327-1330 - Matteo Biasielli, Luca Cassano, Antonio Miele:
An Approximation-based Fault Detection Scheme for Image Processing Applications. 1331-1334 - Gautam Choudhary, Sandeep Pal, Debraj Kundu, Sukanta Bhattacharjee, Shigeru Yamashita, Bing Li, Ulf Schlichtmann, Sudip Roy:
Transport-Free Module Binding for Sample Preparation using Microfluidic Fully Programmable Valve Arrays. 1335-1338 - Roman Gansch, Ahmad Adee:
System Theoretic View on Uncertainties. 1345-1350 - Matthias Rottmann, Kira Maag, Robin Chan, Fabian Hüger, Peter Schlicht, Hanno Gottschalk:
Detection of False Positive and False Negative Samples in Semantic Segmentation. 1351-1356 - Andre Guntoro, Cecilia De la Parra, Farhad Merchant, Florent de Dinechin, John L. Gustafson, Martin Langhammer, Rainer Leupers, Sangeeth Nambiar:
Next Generation Arithmetic for Edge Computing. 1357-1365 - Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran:
REALM: Reduced-Error Approximate Log-based Integer Multiplier. 1366-1371 - Andreas Wendler, Oliver Keszöcze:
A fast BDD Minimization Framework for Approximate Computing. 1372-1377 - Siyuan Xu, Benjamin Carrión Schäfer:
On the Design of High Performance HW Accelerator through High-level Synthesis Scheduling Approximations. 1378-1383 - Justine Bonnot, Daniel Ménard, Karol Desnos:
Fast Kriging-based Error Evaluation for Approximate Computing Systems. 1384-1389 - Manik Singhal, Vijay Raghunathan, Anand Raghunathan:
Communication-efficient View-Pooling for Distributed Multi-View Neural Networks. 1390-1395 - Yuan Cheng, Guangtai Huang, Peining Zhen, Bin Liu, Hai-Bao Chen, Ngai Wong, Hao Yu:
An Anomaly Comprehension Neural Network for Surveillance Videos on Terminal Devices. 1396-1401 - Hiromitsu Awano, Masanori Hashimoto:
BYNQNet: Bayesian Neural Network with Quadratic Activations for Sampling-Free Uncertainty Estimation on FPGA. 1402-1407 - Kai Wang, Fengkai Yuan, Rui Hou, Zhenzhou Ji, Dan Meng:
Capturing and Obscuring Ping-Pong Patterns to Mitigate Continuous Attacks. 1408-1413 - Han Wang, Hossein Sayadi, Tinoosh Mohsenin, Liang Zhao, Avesta Sasan, Setareh Rafatirad, Houman Homayoun:
Mitigating Cache-Based Side-Channel Attacks through Randomization: A Comprehensive System and Architecture Level Analysis. 1414-1419 - Tim Fritzmann, Georg Sigl, Johanna Sepúlveda:
Extending the RISC-V Instruction Set for Hardware Acceleration of the Post-Quantum Scheme LAC. 1420-1425 - Shuhang Zhang, Bing Li, Hai Helen Li, Ulf Schlichtmann:
A Pulse-width Modulation Neuron with Continuous Activation for Processing-In-Memory Engines. 1426-1431 - Chang Ma, Yanan Sun, Weikang Qian, Ziqi Meng, Rui Yang, Li Jiang:
Go Unary: A Novel Synapse Coding and Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing. 1432-1437 - Farzaneh Zokaee, Qian Lou, Nathan Youngblood, Weichen Liu, Yiyuan Xie, Lei Jiang:
LightBulb: A Photonic-Nonvolatile-Memory-based Accelerator for Binarized Convolutional Neural Networks. 1438-1443 - Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi, Ayse K. Coskun:
System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications. 1444-1449 - Hassnaa El-Derhalli, Sébastien Le Beux, Sofiène Tahar:
OSCAR: An Optical Stochastic Computing AcceleRator for Polynomial Functions. 1450-1455 - Yvain Thonnart, Stéphane Bernabé, Jean Charbonnier, Christian Bernard, David Coriat, César Fuguet Tortolero, Pierre Tissier, Benoît Charbonnier, Stéphane Malhouitre, Damien Saint-Patrice, Myriam Assous, Aditya Narayan, Ayse K. Coskun, Denis Dutoit, Pascal Vivet:
POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems. 1456-1461 - David Brooks, Martin M. Frank, Tayfun Gokmen, Udit Gupta, Xiaobo Sharon Hu, Shubham Jain, Ann Franchesca Laguna, Michael T. Niemier, Ian O'Connor, Anand Raghunathan, Ashish Ranjan, Dayane Reis, Jacob R. Stevens, Carole-Jean Wu, Xunzhao Yin:
Emerging Neural Workloads and Their Impact on Hardware. 1462-1471 - Yitu Wang, Fan Chen, Linghao Song, Chuanjin Richard Shi, Hai Helen Li, Yiran Chen:
ReBoc: Accelerating Block-Circulant Neural Networks in ReRAM. 1472-1477 - Chin-Fu Nien, Yi-Jou Hsiao, Hsiang-Yun Cheng, Cheng-Yu Wen, Ya-Cheng Ko, Che-Ching Lin:
GraphRSim: A Joint Device-Algorithm Reliability Analysis for ReRAM-based Graph Processing. 1478-1483 - Mostafa Hadizadeh, Elham Cheshmikhani, Hossein Asadi:
STAIR: High Reliable STT-MRAM Aware Multi-Level I/O Cache Architecture by Adaptive ECC Allocation. 1484-1489 - Muhammad Imran, Taehyun Kwon, Joon-Sung Yang:
Effective Write Disturbance Mitigation Encoding Scheme for High-density PCM. 1490-1495 - Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra:
Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores. 1496-1501 - Asif Ali Khan, Andrés Goens, Fazal Hameed, Jerónimo Castrillón:
Generalized Data Placement Strategies for Racetrack Memories. 1502-1507 - Lukas Jünger, Jan Luca Malte Bölke, Stephan Tobies, Rainer Leupers, Andreas Hoffmann:
ARM-on-ARM: Leveraging Virtualization Extensions for Fast Virtual Platforms. 1508-1513 - Om Prakash, Hussam Amrouch, Sanjeev Manhas, Jörg Henkel:
Impact of NBTI Aging on Self-Heating in Nanowire FET. 1514-1519 - Sukanta Dey, Sukumar Nandi, Gaurav Trivedi:
PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning. 1520-1525 - Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen:
An Efficient MILP-Based Aging-Aware Floorplanner for Multi-Context Coarse-Grained Runtime Reconfigurable FPGAs. 1526-1531 - Emanuel Regnath, Sebastian Steinhorst:
AMSA: Adaptive Merkle Signature Architecture. 1532-1537 - Saru Vig, Rohan Juneja, Siew-Kei Lam:
DISSECT: Dynamic Skew-and-Split Tree for Memory Authentication. 1538-1543 - Rashmi S. Agrawal, Lake Bu, Eliakin Del Rosario, Michel A. Kinsy:
Design-flow Methodology for Secure Group Anonymous Authentication. 1544-1549 - Matthew R. P. Rowlings, Andy M. Tyrrell, Martin A. Trefzer:
Embedded Social Insect-Inspired Intelligence Networks for System-level Runtime Management. 1550-1555 - Lei Xun, Long Tran-Thanh, Bashir M. Al-Hashimi, Geoff V. Merrett:
Optimising Resource Management for Embedded Machine Learning. 1556-1561 - Florian Maurer, Bryan Donyanavard, Amir M. Rahmani, Nikil D. Dutt, Andreas Herkersdorf:
Emergent Control of MPSoC Operation by a Hierarchical Supervisor / Reinforcement Learning Approach. 1562-1567 - Shvan Karim, Jim Harkin, Liam McDaid, Bryan Gardiner, Junxiu Liu:
AstroByte: Multi-FPGA Architecture for Accelerated Simulations of Spiking Astrocyte Neural Networks. 1568-1573 - Josef Strnadel:
Statistical Model Checking of Approximate Circuits: Challenges and Opportunities. 1574-1577 - Tanfer Alan, Andreas Gerstlauer, Jörg Henkel:
Runtime Accuracy-Configurable Approximate Hardware Synthesis Using Logic Gating and Relaxation. 1578-1581 - Vinay B. Y. Kumar, Naina Gupta, Anupam Chattopadhyay, Michael Kasper, Christoph Krauß, Ruben Niederhagen:
Post-Quantum Secure Boot. 1582-1585 - Jiaqi Gu, Zheng Zhao, Chenghao Feng, Hanqing Zhu, Ray T. Chen, David Z. Pan:
ROQ: A Noise-Aware Quantization Scheme Towards Robust Optical Neural Networks with Low-bit Controls. 1586-1589 - Ying Zhu, Grace Li Zhang, Tianchen Wang, Bing Li, Yiyu Shi, Tsung-Yi Ho, Ulf Schlichtmann:
Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise. 1590-1593 - Baogang Zhang, Necati Uysal, Rickard Ewetz:
Computational Restructuring: Rethinking Image Processing using Memristor Crossbar Arrays. 1594-1597 - Saransh Gupta, Mohsen Imani, Joonseop Sim, Andrew Huang, Fan Wu, M. Hassan Najafi, Tajana Rosing:
SCRIMP: A General Stochastic Computing Architecture using ReRAM in-Memory Processing. 1598-1601 - Kanishkan Vadivel, Lorenzo Chelini, Ali BanaGozar, Gagandeep Singh, Stefano Corda, Roel Jordans, Henk Corporaal:
TDO-CIM: Transparent Detection and Offloading for Computation In-memory. 1602-1605 - Cyril Bresch, Roman Lysecky, David Hély:
BackFlow: Backward Edge Control Flow Enforcement for Low End ARM Microcontrollers. 1606-1609 - Ruikai Shi, Liang Yang, Hao Wang:
Delay Sensitivity Polynomials Based Design- Dependent Performance Monitors for Wide Operating Ranges. 1610-1613 - Daniel Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor:
Mitigation of Sense Amplifier Degradation Using Skewed Design. 1614-1617 - Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
Blockchain Technology Enabled Pay Per Use Licensing Approach for Hardware IPs. 1618-1621 - Asif Mirza, Shadi Manafi Avari, Ebadollah Taheri, Sudeep Pasricha, Mahdi Nikdast:
Opportunities for Cross-Layer Design in High-Performance Computing Systems with Integrated Silicon Photonic Networks. 1622-1627 - Shixi Chen, Jiang Xu, Xuanqi Chen, Zhifei Wang, Jun Feng, Jiaxu Zhang, Zhongyuan Tian, Xiao Li:
Efficient Optical Power Delivery System for Hybrid Electronic-Photonic Manycore Processors. 1628-1633 - Christoph Schmittner, Jürgen Dobaj, Georg Macher, Eugen Brenner:
A Preliminary View on Automotive Cyber Security Management Systems. 1634-1639 - Chih-Hong Cheng, Chung-Hao Huang, Thomas Brunner, Vahid Hashemi:
Towards Safety Verification of Direct Perception Neural Networks. 1640-1643 - Kunal Agrawal, Alan Burns, Abhishek Singh, Sanjoy K. Baruah:
Minimizing Execution Duration in the Presence of Learning-Enabled Components. 1644-1649 - Teng Tian, Xi Jin, Letian Zhao, Xiaotian Wang, Jie Wang, Wei Wu:
Exploration of Memory Access Optimization for FPGA-based 3D CNN Accelerator. 1650-1655 - Alexandros Kouris, Stylianos I. Venieris, Christos-Savvas Bouganis:
A Throughput-Latency Co-Optimised Cascade of Convolutional Neural Network Classifiers. 1656-1661 - Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Walter Stechele:
OrthrusPE: Runtime Reconfigurable Processing Elements for Binary Neural Networks. 1662-1667 - Van-Phu Ha, Tomofumi Yuki, Olivier Sentieys:
Towards Generic and Scalable Word-Length Optimization. 1668-1673 - Paul Detterer, Cumhur Erdin, Jos Huisken, Hailong Jiao, Majid Nabi, Twan Basten, José Pineda de Gyvez:
Trading Sensitivity for Power in an IEEE 802.15.4 Conformant Adequate Demodulator. 1674-1679 - Sayandip De, Sajid Mohamed, Konstantinos Bimpisidis, Dip Goswami, Twan Basten, Henk Corporaal:
Approximation Trade Offs in an Image-Based Control System. 1680-1685 - Wanli Chang, Debayan Roy, Shuai Zhao, Anuradha Annaswamy, Samarjit Chakraborty:
CPS-oriented Modeling and Control of Traffic Signals Using Adaptive Back Pressure. 1686-1691 - Enrico Fraccaroli, Alan Michael Padovani, Davide Quaglia, Franco Fummi:
Network Synthesis for Industry 4.0. 1692-1697 - Stefano Spellini, Roberta Chirico, Marco Panato, Michele Lora, Franco Fummi:
Production Recipe Validation through Formalization and Digital Twin Generation. 1698-1703 - Mojtaba Haghi, Yusheng Yao, Dip Goswami, Kees Goossens:
Parallel Implementation of Iterative Learning Controllers on Multi-core Platforms. 1704-1709 - Ken Chau-Cheung Cheng, Katherine Shu-Min Li, Andrew Yi-Ann Huang, Ji-Wei Li, Leon Li-Yang Chen, Nova Cheng-Yen Tsai, Sying-Jyan Wang, Chen-Shiun Lee, Leon Chou, Peter Yi-Yu Liao, Hsing-Chung Liang, Jwu E. Chen:
Wafer-Level Test Path Pattern Recognition and Test Characteristics for Test-Induced Defect Diagnosis. 1710-1711 - Moonsu Kim, Yun Heo, Seungjae Jung, Kelvin Le, Nathaniel Conos, Hanif Fatemi, Jongpil Lee, Youngmin Shin:
A Method of Via Variation Induced Delay Computation. 1712-1713 - Keertana Settaluri, Elias Fallon:
Fully Automated Analog Sub-Circuit Clustering with Graph Convolutional Neural Networks. 1714-1715 - Christophe Flouzat, Erwan Piriou, Mickaël Guibert, Bojan Jovanovic, Mohamad Oussayran:
EVPS: An Automotive Video Acquisition and Processing Platform. 1716-1717 - Iván Rodriguez, Leonidas Kosmidis, Olivier Notebaert, Francisco J. Cazorla, David Steenari:
An On-board Algorithm Implementation on an Embedded GPU: A Space Case Study. 1718-1719 - Jochen Mades, Gerd Ebelt, Boris Janjic, Frederik Lauer, Carl Christian Rheinländer, Norbert Wehn:
TLS-Level Security for Low Power Industrial IoT Network Infrastructures. 1720-1721 - Pedro Henrique Exenberger Becker, Jeckson Dellagostin Souza, Antonio C. S. Beck:
Tuning the ISA for increased heterogeneous computation in MPSoCs. 1722-1727 - Somdip Dey, Amit Kumar Singh, Xiaohang Wang, Klaus D. McDonald-Maier:
User Interaction Aware Reinforcement Learning for Power and Thermal Efficiency of CPU-GPU Mobile MPSoCs. 1728-1733 - Jie Chen, Igor Loi, Luca Benini, Davide Rossi:
Energy-Efficient Two-level Instruction Cache Design for an Ultra-Low-Power Multi-core Cluster. 1734-1739 - Sébastien Thuries, Olivier Billoint, Sylvain Choisnet, Romain Lemaire, Pascal Vivet, Perrine Batude, Didier Lattard:
M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC. 1740-1745 - Shao-Chun Hung, Krishnendu Chakrabarty:
Design of a Reliable Power Delivery Network for Monolithic 3D ICs*. 1746-1751 - Shouvik Musavvir, Anwesha Chatterjee, Ryan Gary Kim, Dae Hyun Kim, Janardhan Rao Doppa, Partha Pratim Pande:
Power, Performance, and Thermal Trade-offs in M3D-enabled Manycore Chips. 1752-1757
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