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ORCID20th IEEE Symposium on Computer Arithmetic 2011: Tübingen, Germany
- Elisardo Antelo, David Hough, Paolo Ienne:
20th IEEE Symposium on Computer Arithmetic, ARITH 2011, Tübingen, Germany, 25-27 July 2011. IEEE Computer Society 2011, ISBN 978-0-7695-4318-5
Keynote Talk
- Ralf Fischer:
High Intelligence Computing: The New Era of High Performance Computing. 3
Multiple-Precision Algorithms
- David Harvey
, Paul Zimmermann:
Short Division of Long Integers. 7-14 - Marco Bodrato:
High Degree Toom'n'Half for Balanced and Unbalanced Multiplication. 15-22 - Nicolas Brisebarre, Mioara Joldes, Peter Kornerup, Érik Martin-Dorel, Jean-Michel Muller:
Augmented Precision Square Roots and 2-D Norms, and Discussion on Correctly Rounding sqrt(x^2+y^2). 23-30
Transcendental Methods
- Mark G. Arnold, John R. Cowles, Vassilis Paliouras, Ioannis Kouretas:
Towards a Quaternion Complex Logarithmic Number System. 33-42 - Rizalafande Che Ismail, J. Nicholas Coleman:
ROM-less LNS. 43-51 - Álvaro Vázquez, Javier D. Bruguera:
Composite Iterative Algorithm and Architecture for q-th Root Calculation. 52-61 - Omid Sarbishei, Katarzyna Radecka:
On the Fixed-Point Accuracy Analysis and Optimization of FFT Units with CORDIC Multipliers. 62-69
Special Session on Industrial Practices
- Daniel Lipetz, Eric Schwarz:
Self Checking in Current Floating-Point Units. 73-76 - Claude-Pierre Jeannerod, Jingyan Jourdan-Lu, Christophe Monat, Guillaume Revy:
How to Square Floats Accurately and Efficiently on the ST231 Integer Processor. 77-81 - Timothy Anderson, Duc Bui, Shriram Moharil, Soujanya Narnur, Mujibur Rahman, Anthony Lell, Eric Biscondi, Ashish Shrivastava, Peter Dent, Mingjian Yan, Hasan Mahmood:
A 1.5 Ghz VLIW DSP CPU with Integrated Floating Point and Fixed Point Instructions in 40 nm CMOS. 82-86 - Maarten Boersma, Michael Kroener, Christophe Layer, Petra Leber, Silvia M. Müller, Kerstin Schelm:
The POWER7 Binary Floating-Point Unit. 87-91
Addition
- Thomas B. Preußer, Martin Zabel, Rainer G. Spallek:
Accelerating Computations on FPGA Carry Chains by Operand Compaction. 95-102 - Neil Burgess:
Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI. 103-111 - Saeid Gorgin, Ghassem Jaberipur:
A Family of High Radix Signed Digit Adders. 112-120
Floating-Point Units
- David Raymond Lutz:
Fused Multiply-Add Microarchitecture Comprising Separate Early-Normalizing Multiply and Add Pipelines. 123-128 - Sameh Galal, Mark Horowitz:
Latency Sensitive FMA Design. 129-138 - Steven R. Carlough, Adam Collura, Silvia M. Müller, Michael Kroener:
The IBM zEnterprise-196 Decimal Floating-Point Accelerator. 139-146
Division, Square-Root and Reciprocal Square-Root
- J. Adam Butts, Ping Tak Peter Tang, Ron O. Dror, David E. Shaw:
Radix-8 Digit-by-Rounding: Achieving High-Performance Reciprocals, Square Roots, and Reciprocal Square Roots. 149-158 - Ping Tak Peter Tang, J. Adam Butts, Ron O. Dror, David E. Shaw:
Tight Certification Techniques for Digit-by-Rounding Algorithms with Application to a New 1/sqrt(x) Design. 159-168 - Alberto Nannarelli:
Radix-16 Combined Division and Square Root Unit. 169-176 - David W. Matula, Mihai T. Panu:
A Prescale-Lookup-Postscale Additive Procedure for Obtaining a Single Precision Ulp Accurate Reciprocal. 177-183
Special Session on High Performance Arithmetic for FPGA's
- Martin Langhammer:
Teraflop FPGA Design. 187-188 - Florent de Dinechin:
The Arithmetic Operators You Will Never See in a Microprocessor. 189-190 - Robert G. Dimond, Sébastien Racanière, Oliver Pell:
Accelerating Large-Scale HPC Applications Using FPGAs. 191-192
Arithmetic Algorithms for Cryptography
- Filippo Gandino, Fabrizio Lamberti, Paolo Montuschi, Jean-Claude Bajard:
A General Approach for Improving RNS Montgomery Exponentiation Using Pre-processing. 195-204 - Billy Bob Brumley, Dan Page:
Bit-Sliced Binary Normal Basis Multiplication. 205-212 - Joppe W. Bos, Thorsten Kleinjung, Arjen K. Lenstra, Peter L. Montgomery:
Efficient SIMD Arithmetic Modulo a Mersenne Number. 213-221
Tools for Formal Certified Code
- Sylvain Chevillard:
Automatic Generation of Code for the Evaluation of Constant Expressions at Any Precision with a Guaranteed Error Bound. 225-232 - Christophe Mouilleron, Guillaume Revy:
Automatic Generation of Fast and Certified Code for Polynomial Evaluation. 233-242 - Sylvie Boldo, Guillaume Melquiond:
Flocq: A Unified Library for Proving Floating-Point Algorithms in Coq. 243-252
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