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ORCIDVigyan Singhal
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2010 – 2019
- 2015
[c32]Chirag Agarwal, Paul Hylander, Yogesh Mahajan, Jonathan Michelson, Vigyan Singhal:
Compositional Reasoning Gotchas in Practice. FMCAD 2015: 17-24- 2011
- [c31]Vigyan Singhal, Prashant Aggarwal:
Using Coverage to Deploy Formal Verification in a Simulation World. CAV 2011: 44-49 - [c30]Prashant Aggarwal, Darrow Chu, Vijay Kadamby, Vigyan Singhal:
Planning for end-to-end formal using simulation-based coverage: invited tutorial. FMCAD 2011: 9-16 - [c29]B. A. Krishna, Jonathan Michelson, Vigyan Singhal, Alok Jain:
Liveness vs Safety - A Practical Viewpoint. Haifa Verification Conference 2011: 80-94
2000 – 2009
- 2008
- [c28]Abhishek Datta, Vigyan Singhal:
Formal Verification of a Public-Domain DDR2 Controller Design. VLSI Design 2008: 475-480 - 2003
- [j11]Anuj Goel, Khurram Sajid, Hai Zhou, Adnan Aziz, Vigyan Singhal:
BDD Based Procedures for a Theory of Equality with Uninterpreted Functions. Formal Methods Syst. Des. 22(3): 205-224 (2003) - [j10]Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz:
An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based Netlists. Formal Methods Syst. Des. 23(1): 39-65 (2003) - [j9]Vigyan Singhal, Carl Pixley, Adnan Aziz, Shaz Qadeer, Robert K. Brayton:
Sequential optimization in the absence of global reset. ACM Trans. Design Autom. Electr. Syst. 8(2): 222-251 (2003) - 2002
- [j8]Adnan Aziz, Thomas R. Shiple, Vigyan Singhal, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
:
Formula-Dependent Equivalence for Compositional CTL Model Checking. Formal Methods Syst. Des. 21(2): 193-224 (2002) - 2001
- [j7]Malay K. Ganai, Praveen Yalagandula, Adnan Aziz, Andreas Kuehlmann, Vigyan Singhal:
SIVA: A System for Coverage-Directed State Space Search. J. Electron. Test. 17(1): 11-27 (2001) - [j6]Vigyan Singhal, Carl Pixley, Adnan Aziz, Robert K. Brayton:
Theory of safe replacements for sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2): 249-265 (2001) - [j5]Tai-Hung Liu, Adnan Aziz, Vigyan Singhal:
Optimizing designs containing black boxes. ACM Trans. Design Autom. Electr. Syst. 6(4): 591-601 (2001) - 2000
- [j4]Adnan Aziz, Kumud Sanwal, Vigyan Singhal, Robert K. Brayton:
Model-checking continous-time Markov chains. ACM Trans. Comput. Log. 1(1): 162-170 (2000) - [c27]Jason Baumgartner, Anson Tripp, Adnan Aziz, Vigyan Singhal, Flemming Andersen:
An Abstraction Algorithm for the Verification of Generalized C-Slow Designs. CAV 2000: 5-19 - [c26]Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal:
BDS: a BDD-based logic optimization system. DAC 2000: 92-97 - [c25]Praveen Yalagandula, Adnan Aziz, Vigyan Singhal:
Automatic Lighthouse Generation for Directed State Space Search. DATE 2000: 237-242
1990 – 1999
- 1999
- [j3]Adnan Aziz, Felice Balarin, Vigyan Singhal, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Equivalences for Fair Kripke Structures. Chic. J. Theor. Comput. Sci. 1999 (1999) - [j2]Carl Pixley, Vigyan Singhal:
Model Checking: A Hardware Design Perspective. Int. J. Softw. Tools Technol. Transf. 2(3): 288-306 (1999) - [c24]Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz:
Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance Netlists. CAV 1999: 72-83 - [c23]Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton:
Using Combinational Verification for Sequential Circuits. DATE 1999: 138-144 - [c22]Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal:
BDD Decomposition for Efficient Logic Synthesis. ICCD 1999: 626- - 1998
- [c21]Anuj Goel, Khurram Sajid, Hai Zhou, Adnan Aziz, Vigyan Singhal:
BDD Based Procedures for a Theory of Equality with Uninterpreted Functions. CAV 1998: 244-255 - [c20]Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton:
On the optimization power of retiming and resynthesis transformations. ICCAD 1998: 402-407 - [c19]Jerry R. Burch, Vigyan Singhal:
Robust latch mapping for combinational equivalence checking. ICCAD 1998: 563-569 - [c18]Jerry R. Burch, Vigyan Singhal:
Tight integration of combinational verification methods. ICCAD 1998: 570-576 - 1997
- [j1]Vigyan Singhal, Alan Jay Smith:
Analysis of Locking Behavior in Three Real Database Systems. VLDB J. 6(1): 40-52 (1997) - [c17]Tai-Hung Liu, Khurram Sajid, Adnan Aziz, Vigyan Singhal:
Optimizing Designs Containing Black Boxes. DAC 1997: 113-116 - [c16]Amit Mehrotra, Shaz Qadeer, Vigyan Singhal, Robert K. Brayton, Adnan Aziz, Alberto L. Sangiovanni-Vincentelli:
Sequential optimisation without state space exploration. ICCAD 1997: 208-215 - 1996
- [c15]Adnan Aziz, Kumud Sanwal, Vigyan Singhal, Robert K. Brayton:
Verifying Continuous Time Markov Chains. CAV 1996: 269-276 - [c14]Vigyan Singhal, Sharad Malik, Robert K. Brayton:
The case for retiming with explicit reset circuitry. ICCAD 1996: 618-625 - [c13]Shaz Qadeer, Robert K. Brayton, Vigyan Singhal:
Latch Redundancy Removal Without Global Reset. ICCD 1996: 432-439 - 1995
- [c12]Adnan Aziz, Vigyan Singhal, Felice Balarin:
It Usually Works: The Temporal Logic of Stochastic Systems. CAV 1995: 155-165 - [c11]Vigyan Singhal, Carl Pixley, Richard L. Rudell, Robert K. Brayton:
The Validity of Retiming Sequential Circuits. DAC 1995: 316-321 - [c10]Vigyan Singhal, Carl Pixley, Adnan Aziz, Robert K. Brayton:
Exploiting power-up delay for sequential optimization. EURO-DAC 1995: 54-59 - [c9]Gitanjali Swamy, Robert K. Brayton, Vigyan Singhal:
Incremental methods for FSM traversal. ICCD 1995: 590-595 - [c8]Vigyan Singhal, Robert K. Brayton, Carl Pixley:
Power-Up Delay for Retiming Digital Circuits. ISCAS 1995: 566-569 - 1994
- [c7]Vigyan Singhal, Carl Pixley:
The Verifiacation Problem for Safe Replaceability. CAV 1994: 311-323 - [c6]Adnan Aziz, Thomas R. Shiple, Vigyan Singhal:
Formula-Dependent Equivalence for Compositional CTL Model Checking. CAV 1994: 324-337 - [c5]Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
HSIS: A BDD-Based Environment for Formal Verification. DAC 1994: 454-459 - [c4]Adnan Aziz, Vigyan Singhal, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Equivalences for Fair Kripke Structures. ICALP 1994: 364-375 - [c3]Carl Pixley, Vigyan Singhal, Adnan Aziz, Robert K. Brayton:
Multi-level synthesis for safe replaceability. ICCAD 1994: 442-449 - [c2]Adnan Aziz, Vigyan Singhal, Gitanjali Swamy, Robert K. Brayton:
Minimizing Interacting Finite State Machines: A Compositional Approach to Language to Containment. ICCD 1994: 255-261 - 1993
- [c1]Vigyan Singhal, Yosinori Watanabe, Robert K. Brayton:
Heuristic Minimization of Synchronous Relations. ICCD 1993: 428-433
Coauthor Index
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