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2020 – today
- 2024
[c65]Ruchir Puri
:
Engineering the Future of IC Design with AI. ISPD 2024: 1- [i14]Mayank Mishra, Matt Stallone, Gaoyuan Zhang, Yikang Shen, Aditya Prasad, Adriana Meza Soria, Michele Merler, Parameswaran Selvam, Saptha Surendran, Shivdeep Singh, Manish Sethi, Xuan-Hong Dang, Pengyuan Li, Kun-Lung Wu, Syed Zawad, Andrew Coleman, Matthew White, Mark Lewis, Raju Pavuluri, Yan Koyfman, Boris Lublinsky, Maximilien de Bayser, Ibrahim Abdelaziz, Kinjal Basu, Mayank Agarwal, Yi Zhou, Chris Johnson, Aanchal Goyal, Hima Patel, S. Yousaf Shah, Petros Zerfos, Heiko Ludwig, Asim Munawar, Maxwell Crouse, Pavan Kapanipathi, Shweta Salaria, Bob Calio, Sophia Wen, Seetharami Seelam, Brian Belgodere, Carlos A. Fonseca, Amith Singhee, Nirmit Desai, David D. Cox, Ruchir Puri, Rameswar Panda:
Granite Code Models: A Family of Open Foundation Models for Code Intelligence. CoRR abs/2405.04324 (2024) - [i13]Nicolas Dupuis, Luca Buratti, Sanjay Vishwakarma, Aitana Viudes Forrat, David Kremer, Ismael Faro, Ruchir Puri, Juan Cruz-Benito:
Qiskit Code Assistant: Training LLMs for generating Quantum Computing Code. CoRR abs/2405.19495 (2024) - [i12]Luyao Shi, Michael A. Kazda, Bradley Sears, Nick Shropshire, Ruchir Puri:
Ask-EDA: A Design Assistant Empowered by LLM, Hybrid RAG and Abbreviation De-hallucination. CoRR abs/2406.06575 (2024) - [i11]Sanjay Vishwakarma, Francis Harkins, Siddharth Golecha, Vishal Sharathchandra Bajpe, Nicolas Dupuis, Luca Buratti, David Kremer, Ismael Faro, Ruchir Puri, Juan Cruz-Benito:
Qiskit HumanEval: An Evaluation Benchmark For Quantum Code Generative Models. CoRR abs/2406.14712 (2024) - [i10]Talia Gershon, Seetharami Seelam, Brian Belgodere, Milton Bonilla, Lan Hoang, Danny Barnett, I-Hsin Chung, Apoorve Mohan, Ming-Hung Chen, Lixiang Luo, Robert Walkup, Constantinos Evangelinos, Shweta Salaria, Marc Dombrowa, Yoonho Park, Apo Kayi, Liran Schour, Alim Alim, Ali Sydney, Pavlos Maniotis, Laurent Schares, Bernard Metzler, Bengi Karacali-Akyamac, Sophia Wen, Tatsuhiro Chiba, Sunyanan Choochotkaew, Takeshi Yoshimura, Claudia Misale, Tonia Elengikal, Kevin O. Connor, Zhuoran Liu, Richard Molina, Lars Schneidenbach, James Caden, Christopher Laibinis, Carlos Fonseca, Vasily Tarasov, Swaminathan Sundararaman, Frank B. Schmuck, Scott Guthridge, Jeremy Cohn, Marc Eshel, Paul Muench, Runyu Liu, William Pointer, Drew Wyskida, Bob Krull, Ray Rose, Brent Wolfe, William Cornejo, John Walter, Colm Malone, Clifford Perucci, Frank Franco, Nigel Hinds, Bob Calio, Pavel Druyan, Robert Kilduff, John Kienle, Connor McStay, Andrew Figueroa, Matthew Connolly, Edie Fost, Gina Roma, Jake Fonseca, Ido Levy, Michele Payne, Ryan Schenkel, Amir Malki, Lion Schneider, Aniruddha Narkhede, Shekeba Moshref, Alexandra Kisin, Olga Dodin, Bill Rippon, Henry Wrieth, John Ganci, Johnny Colino, Donna Habeger-Rose, Rakesh Pandey, Aditya Gidh, Aditya Gaur, Dennis Patterson, Samsuddin Salmani, Rambilas Varma, Rumana Rumana, Shubham Sharma, Mayank Mishra, Rameswar Panda, Aditya Prasad, Matt Stallone, Gaoyuan Zhang, Yikang Shen, David Cox, Ruchir Puri, Dakshi Agrawal, Drew Thorstensen, Joel Belog, Brent Tang:
The infrastructure powering IBM's Gen AI model development. CoRR abs/2407.05467 (2024) - [i9]Matt Stallone, Vaibhav Saxena, Leonid Karlinsky, Bridget McGinn, Tim Bula, Mayank Mishra, Adriana Meza Soria, Gaoyuan Zhang, Aditya Prasad, Yikang Shen, Saptha Surendran, Shanmukha C. Guttula, Hima Patel, Parameswaran Selvam, Xuan-Hong Dang, Yan Koyfman, Atin Sood, Rogério Feris, Nirmit Desai, David D. Cox, Ruchir Puri, Rameswar Panda:
Scaling Granite Code Models to 128K Context. CoRR abs/2407.13739 (2024) - 2023
- [c64]Saurabh Pujar, Luca Buratti, Xiaojie Guo, Nicolas Dupuis, Burn L. Lewis, Sahil Suneja, Atin Sood, Ganesh Nalawade, Matthew Jones, Alessandro Morari, Ruchir Puri:
Invited: Automated Code generation for Information Technology Tasks in YAML through Large Language Models. DAC 2023: 1-4 - [i8]Saurabh Pujar, Luca Buratti, Xiaojie Guo, Nicolas Dupuis, Burn L. Lewis, Sahil Suneja, Atin Sood, Ganesh Nalawade, Matthew Jones, Alessandro Morari, Ruchir Puri:
Automated Code generation for Information Technology Tasks in YAML through Large Language Models. CoRR abs/2305.02783 (2023) - 2021
- [j24]Ruchir Puri, Neil Yorke-Smith:
Editorial Introduction. AI Mag. 42(2): 3-4 (2021) - [c63]Ruchir Puri, David S. Kung, Geert Janssen, Wei Zhang, Giacomo Domeniconi, Vladimir Zolotov, Julian Dolby, Jie Chen, Mihir R. Choudhury, Lindsey Decker, Veronika Thost, Luca Buratti, Saurabh Pujar, Shyam Ramji, Ulrich Finkler, Susan Malaika, Frederick Reiss:
CodeNet: A Large-Scale AI for Code Dataset for Learning a Diversity of Coding Tasks. NeurIPS Datasets and Benchmarks 2021 - [c62]Ruchir Puri:
Engineering the Future of AI for the Enterprises : Keynote 4. SERVICES 2021: xxv - [i7]Ruchir Puri, David S. Kung, Geert Janssen, Wei Zhang, Giacomo Domeniconi, Vladimir Zolotov, Julian Dolby, Jie Chen, Mihir R. Choudhury, Lindsey Decker, Veronika Thost, Luca Buratti, Saurabh Pujar, Ulrich Finkler:
Project CodeNet: A Large-Scale AI for Code Dataset for Learning a Diversity of Coding Tasks. CoRR abs/2105.12655 (2021) - 2020
- [c61]Umang Bhatt, Alice Xiang, Shubham Sharma, Adrian Weller, Ankur Taly, Yunhan Jia, Joydeep Ghosh, Ruchir Puri, José M. F. Moura, Peter Eckersley:
Explainable machine learning in deployment. FAT* 2020: 648-657
2010 – 2019
- 2019
- [j23]Wilfried Haensch, Tayfun Gokmen, Ruchir Puri:
The Next Generation of Deep Learning Hardware: Analog Computing. Proc. IEEE 107(1): 108-122 (2019) - [c60]Pranay Kr. Lohia, Karthikeyan Natesan Ramamurthy, Manish Bhide, Diptikalyan Saha, Kush R. Varshney, Ruchir Puri:
Bias Mitigation Post-processing for Individual and Group Fairness. ICASSP 2019: 2847-2851 - [i6]Atin Sood, Benjamin Elder, Benjamin Herta, Chao Xue, Costas Bekas, A. Cristiano I. Malossi, Debashish Saha, Florian Scheidegger, Ganesh Venkataraman, Gegi Thomas, Giovanni Mariani, Hendrik Strobelt, Horst Samulowitz, Martin Wistuba, Matteo Manica, Mihir R. Choudhury, Rong Yan, Roxana Istrate, Ruchir Puri, Tejaswini Pedapati:
NeuNetS: An Automated Synthesis Engine for Neural Network Design. CoRR abs/1901.06261 (2019) - [i5]Amit Dhurandhar, Tejaswini Pedapati, Avinash Balakrishnan, Pin-Yu Chen, Karthikeyan Shanmugam, Ruchir Puri:
Model Agnostic Contrastive Explanations for Structured Data. CoRR abs/1906.00117 (2019) - [i4]Umang Bhatt, Alice Xiang, Shubham Sharma, Adrian Weller, Ankur Taly, Yunhan Jia, Joydeep Ghosh, Ruchir Puri, José M. F. Moura, Peter Eckersley:
Explainable Machine Learning in Deployment. CoRR abs/1909.06342 (2019) - 2018
- [i3]Pranay Kr. Lohia, Karthikeyan Natesan Ramamurthy, Manish Bhide, Diptikalyan Saha, Kush R. Varshney, Ruchir Puri:
Bias Mitigation Post-processing for Individual and Group Fairness. CoRR abs/1812.06135 (2018) - 2017
- [j22]Bishwaranjan Bhattacharjee, Scott Boag, Chandani Doshi, Parijat Dube, Ben Herta, Vatche Ishakian, K. R. Jayaram, Rania Khalaf, Avesh Krishna, Yu Bo Li, Vinod Muthusamy, Ruchir Puri, Yufei Ren, Florian Rosenberg, Seetharami R. Seelam, Yi Wang, Jian Ming Zhang, Li Zhang:
IBM Deep Learning Service. IBM J. Res. Dev. 61(4-5): 10:1-10:11 (2017) - [j21]Robert Karam, Somnath Paul, Ruchir Puri, Swarup Bhunia:
Memory-Centric Reconfigurable Accelerator for Classification and Machine Learning Applications. ACM J. Emerg. Technol. Comput. Syst. 13(3): 34:1-34:24 (2017) - [i2]Bishwaranjan Bhattacharjee, Scott Boag, Chandani Doshi, Parijat Dube, Ben Herta, Vatche Ishakian, K. R. Jayaram, Rania Khalaf, Avesh Krishna, Yu Bo Li, Vinod Muthusamy, Ruchir Puri, Yufei Ren, Florian Rosenberg, Seetharami R. Seelam, Yandong Wang, Jian Ming Zhang, Li Zhang:
IBM Deep Learning Service. CoRR abs/1709.05871 (2017) - 2016
- [j20]Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan:
Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(5): 820-831 (2016) - [j19]Robert Karam, Ruchir Puri, Swarup Bhunia:
Energy-Efficient Adaptive Hardware Accelerator for Text Mining Application Kernels. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3526-3537 (2016) - [i1]Haifeng Qian, Hui Wan, Mark N. Wegman, Luis A. Lastras, Ruchir Puri:
A Proximity Measure using Blink Model. CoRR abs/1612.07365 (2016) - 2015
- [b1]Rajesh Bordawekar, Bob Blainey, Ruchir Puri:
Analyzing Analytics. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2015, ISBN 978-3-031-00621-0 - [j18]Victor V. Zyuban, Joshua Friedrich, Daniel M. Dreps, Jürgen Pille, Donald W. Plass, Phillip J. Restle, Zeynep Toprak Deniz, Matthew M. Ziegler, Sam G. Chu, Md. Saiful Islam, James D. Warnock, Bob Philhower, Rahul M. Rao, Gregory S. Still, David Shan, Eric Fluhr, Jose Paredes, Dieter F. Wendel, Christopher J. Gonzalez, D. Hogenmiller, Ruchir Puri, Scott A. Taylor, Stephen D. Posluszny:
IBM POWER8 circuit design and energy optimization. IBM J. Res. Dev. 59(1) (2015) - [j17]James D. Warnock, Christopher J. Berry, Michael H. Wood, Leon J. Sigal, Yun-Chan Myung, Guenter Mayer, Mark D. Mayo, Y. Chan, Frank Malgioglio, Gerald Strevig, Charudhattan Nagarajan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Howard H. Smith, Di Phan, Ricardo Nigaglioni, Thomas Strach, Matthew M. Ziegler, Niels Fricke, K. Lind, José Neves, Sridhar H. Rangarajan, J. P. Surprise, John Isakson, John Badar, Doug Malone, Donald W. Plass, A. Aipperspach, Dieter F. Wendel, Robert M. Averill III, Ruchir Puri:
IBM z13 circuit design and methodology. IBM J. Res. Dev. 59(4/5) (2015) - [j16]Robert Karam, Ruchir Puri, Swaroop Ghosh, Swarup Bhunia:
Emerging Trends in Design and Applications of Memory-Based Computing and Content-Addressable Memories. Proc. IEEE 103(8): 1311-1330 (2015) - [j15]Minsik Cho, Daniel Brand, Rajesh Bordawekar, Ulrich Finkler, Vincent KulandaiSamy, Ruchir Puri:
PARADIS: An Efficient Parallel Algorithm for In-place Radix Sort. Proc. VLDB Endow. 8(12): 1518-1529 (2015) - [c59]Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan:
Polynomial time algorithm for area and power efficient adder synthesis in high-performance designs. ASP-DAC 2015: 249-254 - [c58]Ruchir Puri, Vijay Raghunathan:
Message from the program chairs. ISLPED 2015: 1 - [c57]James D. Warnock, Brian W. Curran, John Badar, Gregory Fredeman, Donald W. Plass, Yuen H. Chan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Frank Malgioglio, Guenter Mayer, Christopher J. Berry, Michael H. Wood, Yiu-Hing Chan, Mark D. Mayo, John Isakson, Charudhattan Nagarajan, Tobias Werner, Leon J. Sigal, Ricardo Nigaglioni, Mark Cichanowski, Jeffrey A. Zitz, Matthew M. Ziegler, Tim Bronson, Gerald Strevig, Daniel Dreps, Ruchir Puri, Douglas Malone, Dieter F. Wendel, Pak-kin Mak, Michael A. Blake:
4.1 22nm Next-generation IBM System z microprocessor. ISSCC 2015: 1-3 - 2014
- [j14]James D. Warnock, Yuen H. Chan, Hubert Harrer, Sean M. Carey, Gerard Salem, Doug Malone, Ruchir Puri, Jeffrey A. Zitz, Adam Jatkowski, Gerald Strevig, Ayan Datta, Anne Gattiker, Aditya Bansal, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, David L. Rude, Leon J. Sigal, Thomas Strach, Howard H. Smith, Huajun Wen, Pak-kin Mak, Chung-Lung Kevin Shum, Donald W. Plass, Charles F. Webb:
Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module. IEEE J. Solid State Circuits 49(1): 9-18 (2014) - [j13]Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan:
Towards Optimal Performance-Area Trade-Off in Adders by Synthesis of Parallel Prefix Structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(10): 1517-1530 (2014) - [c56]Matthew M. Ziegler, Ruchir Puri, Bob Philhower, Robert L. Franch, Wing K. Luk, Jens Leenstra, Peter Verwegen, Niels Fricke, George Gristede, Eric Fluhr, Victor V. Zyuban:
POWER8 design methodology innovations for improving productivity and reducing power. CICC 2014: 1-9 - [c55]Somnath Paul, Robert Karam, Swarup Bhunia, Ruchir Puri:
Energy-efficient hardware acceleration through computing in the memory. DATE 2014: 1-6 - [c54]Ruchir Puri:
Application driven high level design in the era of heterogeneous computing. ICCAD 2014: 71 - [c53]Joshua Friedrich, Hung Q. Le, William J. Starke, Jeff Stuecheli, Balaram Sinharoy, Eric J. Fluhr, Daniel M. Dreps, Victor V. Zyuban, Gregory S. Still, Christopher J. Gonzalez, David Hogenmiller, Frank Malgioglio, Ryan Nett, Ruchir Puri, Phillip J. Restle, David Shan, Zeynep Toprak Deniz, Dieter F. Wendel, Matthew M. Ziegler, Dave W. Victor:
The POWER8TM processor: Designed for big data, analytics, and cloud environments. ICICDT 2014: 1-4 - [c52]Ruchir Puri, Mihir R. Choudhury, Haifeng Qian, Matthew M. Ziegler:
Bridging high performance and low power in processor design. ISLPED 2014: 183-188 - [c51]Eric J. Fluhr, Joshua Friedrich, Daniel M. Dreps, Victor V. Zyuban, Gregory S. Still, Christopher J. Gonzalez, Allen Hall, David Hogenmiller, Frank Malgioglio, Ryan Nett, Jose Paredes, Juergen Pille, Donald W. Plass, Ruchir Puri, Phillip J. Restle, David Shan, Kevin Stawiasz, Zeynep Toprak Deniz, Dieter F. Wendel, Matthew M. Ziegler:
5.1 POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth. ISSCC 2014: 96-97 - 2013
- [c50]Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan:
Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures. DAC 2013: 48:1-48:8 - [c49]Haoxing Ren, Ruchir Puri, Lakshmi N. Reddy, Smita Krishnaswamy, Cindy Washburn, Joel Earl, Joachim Keinert:
Intuitive ECO synthesis for high performance circuits. DATE 2013: 1002-1007 - [c48]Minsik Cho, Hua Xiang, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri:
LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs. ICCAD 2013: 342-348 - [c47]Hua Xiang, Lakshmi N. Reddy, Louise Trevillyan, Ruchir Puri:
Depth controlled symmetric function fanin tree restructure. ICCAD 2013: 585-591 - [c46]Hua Xiang, Minsik Cho, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri:
Network flow based datapath bit slicing. ISPD 2013: 139-146 - [c45]Ruchir Puri:
Opportunities and challenges for high performance microprocessor designs and design automation. ISPD 2013: 179 - [c44]James D. Warnock, Yuen H. Chan, Hubert Harrer, David L. Rude, Ruchir Puri, Sean M. Carey, Gerard Salem, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, Adam Jatkowski, Gerald Strevig, Leon J. Sigal, Ayan Datta, Anne Gattiker, Aditya Bansal, Doug Malone, Thomas Strach, Huajun Wen, Pak-kin Mak, Chung-Lung Kevin Shum, Donald W. Plass, Charles F. Webb:
5.5GHz system z microprocessor and multi-chip module. ISSCC 2013: 46-47 - [c43]Ruchir Puri:
Keynote talk: Opportunities and challenges for high performance microprocessor designs and design automation. VLSI Design 2013 - 2011
- [j12]Joshua Friedrich, Ruchir Puri, Uwe Brandt, Markus Bühler, Jack DiLullo, Jeremy Hopkins, Mozammel Hossain, Michael A. Kazda, Joachim Keinert, Zahi M. Kurzum, Douglass Lamb, Alice Lee, Frank Musante, Jens Noack, Peter J. Osler, Stephen D. Posluszny, Haifeng Qian, Shyam Ramji, Vasant B. Rao, Lakshmi N. Reddy, Haoxing Ren, Thomas E. Rosser, Benjamin R. Russell, Cliff C. N. Sze, Gustavo E. Téllez:
Design methodology for the IBM POWER7 microprocessor. IBM J. Res. Dev. 55(3): 9 (2011) - [c42]Jeff Burns, Gary Carpenter, Eren Kursun, Ruchir Puri, James D. Warnock, Michael Scheuermann:
Design, CAD and technology challenges for future processors: 3D perspectives. DAC 2011: 212 - 2010
- [c41]Ruchir Puri, William H. Joyner, Raj Jammy, Ahmed Jerraya, Jan M. Rabaey, Walden C. Rhines, Leon Stok:
EDA challenges and options: investing for the future. DAC 2010: 1-2 - [c40]Minsik Cho, Haoxing Ren, Hua Xiang, Ruchir Puri:
History-based VLSI legalization using network flow. DAC 2010: 286-291 - [c39]Minsik Cho, David Z. Pan, Ruchir Puri:
Novel binary linear programming for high performance clock mesh synthesis. ICCAD 2010: 438-443 - [c38]Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho:
Logical and physical restructuring of fan-in trees. ISPD 2010: 67-74 - [c37]Ruchir Puri, David S. Kung:
The Dawn of 22nm Era: Design and CAD Challenges. VLSI Design 2010: 429-433
2000 – 2009
- 2009
- [c36]David S. Kung, Ruchir Puri:
CAD challenges for 3D ICs. ASP-DAC 2009: 421-422 - [c35]Ching Zhou, Bruce M. Fleischer, Michael Gschwind, Ruchir Puri:
64-bit prefix adders: Power-efficient topologies and design solutions. CICC 2009: 179-182 - [c34]Jason Cong, N. S. Nagaraj, Ruchir Puri, William H. Joyner, Jeff Burns, Moshe Gavrielov, Riko Radojcic, Peter Rickert, Hans Stork:
Moore's Law: another casualty of the financial meltdown? DAC 2009: 202-203 - [c33]Ruchir Puri, Eshel Haritan, Stan Krolikoski, Jason Cong, Tim Kogel, Bradley D. McCredie, John Shen, Andrés Takach:
From milliwatts to megawatts: system level power challenge. DAC 2009: 750-751 - [c32]Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri:
DeltaSyn: An efficient logic difference optimizer for ECO synthesis. ICCAD 2009: 789-796 - [c31]Ruchir Puri:
Will 22nm be our catch 22!: design and cad challenges. ISPD 2009: 59-60 - 2008
- [j11]Hua Xiang, Kai-Yuan Chao, Ruchir Puri, Martin D. F. Wong:
Is Your Layout-Density Verification Exact? - A Fast Exact Deep Submicrometer Density Calculation Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4): 621-632 (2008) - [j10]Hua Xiang, Liang Deng, Ruchir Puri, Kai-Yuan Chao, Martin D. F. Wong:
Fast Dummy-Fill Density Analysis With Coupling Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4): 633-642 (2008) - [j9]Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan:
Track Routing and Optimization for Yield. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(5): 872-882 (2008) - [c30]Ruchir Puri, Devadas Varma, Darvin Edwards, Alan J. Weger, Paul D. Franzon, Andrew Yang, Stephen V. Kosonocky:
Keeping hot chips cool: are IC thermal problems hot air? DAC 2008: 634-635 - [c29]Ruchir Puri, William H. Joyner, Shekhar Borkar, Ty Garibay, Jonathan Lotz, Robert K. Montoye:
Custom is from Venus and synthesis from Mars. DAC 2008: 992 - [r1]Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan:
Placement-Driven Synthesis Design Closure Tool. Handbook of Algorithms for Physical Design Automation 2008 - 2007
- [c28]Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan:
TROY: Track Router with Yield-driven Wire Planning. DAC 2007: 55-58 - [c27]Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian:
Making Manufacturing Work For You. DAC 2007: 107-108 - [c26]Kerry Bernstein, Paul S. Andry, Jerome Cann, Philip G. Emma, David Greenberg, Wilfried Haensch, Mike Ignatowski, Steven J. Koester, John Magerlein, Ruchir Puri, Albert M. Young:
Interconnects in the Third Dimension: Design Challenges for 3D ICs. DAC 2007: 562-567 - [c25]Hua Xiang, Liang Deng, Ruchir Puri, Kai-Yuan Chao, Martin D. F. Wong:
Dummy fill density analysis with coupling constraints. ISPD 2007: 3-10 - [c24]Hua Xiang, Kai-Yuan Chao, Ruchir Puri, Martin D. F. Wong:
Is your layout density verification exact?: a fast exact algorithm for density calculation. ISPD 2007: 19-26 - 2006
- [c23]Ashish Kumar Singh, Murari Mani, Ruchir Puri, Michael Orshansky:
Gain-based technology mapping for minimum runtime leakage under input vector uncertainty. DAC 2006: 522-527 - [c22]David J. Frank, Ruchir Puri, Dorel Toma:
Design and CAD challenges in 45nm CMOS and beyond. ICCAD 2006: 329-333 - [c21]Minsik Cho, David Z. Pan, Hua Xiang, Ruchir Puri:
Wire density driven global routing for CMP variation and timing. ICCAD 2006: 487-492 - [c20]Ruchir Puri, Tanay Karnik, Rajiv V. Joshi:
Technology Impacts on Sub-90nm CMOS Circuit Design and Design Methodologies. VLSI Design 2006: 5-7 - 2005
- [c19]Ruchir Puri, Leon Stok, Subhrajit Bhattacharya:
Keeping hot chips cool. DAC 2005: 285-288 - [c18]Ruchir Puri, David S. Kung, Leon Stok:
Minimizing power with flexible voltage islands. ISCAS (1) 2005: 21-24 - [c17]Anirudh Devgan, Ruchir Puri, Sachin Sapatnaker, Tanay Karnik, Rajiv V. Joshi:
Design of sub-90nm Circuits and Design Methodologies. ISQED 2005: 3-4 - 2004
- [j8]Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda:
An Integrated Environment for Technology Closure of Deep-Submicron IC Designs. IEEE Des. Test Comput. 21(1): 14-22 (2004) - 2003
- [c16]Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni:
Pushing ASIC performance in a power envelope. DAC 2003: 788-793 - [c15]Kerry Bernstein, Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri:
Design and CAD Challenges in sub-90nm CMOS Technologies. ICCAD 2003: 129-137 - [c14]Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri, Keunwoo Kim:
Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits. ISQED 2003: 153-158 - 2002
- [c13]Ruchir Puri, David S. Kung, Anthony D. Drumm:
Fast and accurate wire delay estimation for physical synthesis of large ASICs. ACM Great Lakes Symposium on VLSI 2002: 30-36 - 2001
- [j7]Ruchir Puri, Ching-Te Chuang, Mark B. Ketchen, Mario M. Pelella, Michael G. Rosenfield:
On the temperature dependence of hysteresis effect in floating-body partially depleted SOI CMOS circuits. IEEE J. Solid State Circuits 36(2): 290-298 (2001) - 2000
- [j6]Frederik Beeftink, Prabhakar Kudva, David S. Kung, Ruchir Puri, Leon Stok:
Combinatorial cell design for CMOS libraries. Integr. 29(1): 67-93 (2000) - [j5]Ruchir Puri, Ching-Te Chuang:
Hysteresis effect in pass-transistor-based, partially depleted SOI CMOS circuits. IEEE J. Solid State Circuits 35(4): 625-631 (2000) - [c12]Ruchir Puri, Ching-Te Chuang:
SOI Digital Circuits: Design Issues. VLSI Design 2000: 474-479
1990 – 1999
- 1999
- [c11]Ching-Te Chuang, Ruchir Puri:
SOI Digital CMOS VLSI - a Design Perspective. DAC 1999: 709-714 - [c10]David S. Kung, Ruchir Puri:
Optimal P/N width ratio selection for standard cell libraries. ICCAD 1999: 178-184 - [c9]Ruchir Puri, Ching-Te Chuang:
Hysteresis effect in floating-body partially-depleted SOI CMOS domino circuits. ISLPED 1999: 223-228 - 1998
- [c8]Ruchir Puri:
Design issues in mixed static-domino circuit implementations. ICCD 1998: 270-275 - 1996
- [j4]Ruchir Puri, Jun Gu:
A BDD SAT Solver for Satisfiability Testing: An Industrial Case Study. Ann. Math. Artif. Intell. 17(3-4): 315-337 (1996) - [c7]Ruchir Puri, Andrew Bjorksten, Thomas E. Rosser:
Logic optimization by output phase assignment in dynamic logic synthesis. ICCAD 1996: 2-7 - 1995
- [j3]Jun Gu, Ruchir Puri:
Asynchronous circuit synthesis with Boolean satisfiability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(8): 961-973 (1995) - 1994
- [c6]Ruchir Puri, Jun Gu:
A Modular Partitioning Approach for Asynchronous Circuit Synthesis. DAC 1994: 63-69 - [c5]Ruchir Puri, Jun Gu:
Area Efficient Synthesis of Asynchronous Interface Circuits. ICCD 1994: 212-216 - [c4]Ruchir Puri, Jun Gu:
A divide-and-conquer approach for asynchronous interface synthesis. HLSS 1994: 118-125 - 1993
- [j2]Ruchir Puri, Jun Gu:
An efficient algorithm to search for minimal closed covers in sequential machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(6): 737-745 (1993) - [j1]Ruchir Puri, Jun Gu:
Microword length minimization in microprogrammed controller synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10): 1449-1457 (1993) - [c3]Ruchir Puri, Jun Gu:
Signal Transition Graph Constraints for Speed-independent Ciruit Synthesis. ISCAS 1993: 1686-1689 - 1992
- [c2]Ruchir Puri, Jun Gu:
An Efficient algorithm for Microword Length Minimization. DAC 1992: 651-656 - 1991
- [c1]Ruchir Puri, Jun Gu:
Searching for a minimal finite state automaton (FSA). ICTAI 1991: 416-423
Coauthor Index
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